From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7928) id 795B43857B8E; Mon, 18 Sep 2023 12:33:09 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 795B43857B8E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1695040389; bh=aaQFGCuIDhST1P2cDjTilRwZyGYVzr11Xz0pae9kGh4=; h=From:To:Subject:Date:From; b=UmH8PIXZstapWaMk3jnFLPUpNg1TZGeKTCqrTnuTQEE9khQeVxx5zYCA23M/RrTwM ifKiLuaOPtve2lCY6BA5Nxt38C3jytWAEYKZk7lLYYUDZdWQOV5sqL5XBsgySw8nRm m9Oc2lhylD2LRqx9aC3YR5s2h1sXq+rvais46v6w= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Lehua Ding To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-4098] RISC-V: Fix bogus FAILs of vsetvl testcases X-Act-Checkin: gcc X-Git-Author: Juzhe-Zhong X-Git-Refname: refs/heads/trunk X-Git-Oldrev: 1b03c73295266984378dd9da99a9458b591b964c X-Git-Newrev: bdb7d85dde56b69af378adcffe45accf792cf4fd Message-Id: <20230918123309.795B43857B8E@sourceware.org> Date: Mon, 18 Sep 2023 12:33:09 +0000 (GMT) List-Id: https://gcc.gnu.org/g:bdb7d85dde56b69af378adcffe45accf792cf4fd commit r14-4098-gbdb7d85dde56b69af378adcffe45accf792cf4fd Author: Juzhe-Zhong Date: Mon Sep 18 20:28:54 2023 +0800 RISC-V: Fix bogus FAILs of vsetvl testcases Due the the global codes change which change the CFG cause bogus vsetvl checking FAILs. Adapt testcases for the global codes change. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/avl_single-21.c: Adapt test. * gcc.target/riscv/rvv/vsetvl/avl_single-26.c: Ditto. * gcc.target/riscv/rvv/vsetvl/avl_single-39.c: Ditto. * gcc.target/riscv/rvv/vsetvl/avl_single-41.c: Ditto. * gcc.target/riscv/rvv/vsetvl/avl_single-6.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c: Ditto. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c: Ditto. Diff: --- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c | 4 ++-- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c | 4 ++-- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c | 4 ++-- 7 files changed, 10 insertions(+), 10 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c index d8f114c614d..d949933f841 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c @@ -29,4 +29,4 @@ void f (int8_t * restrict in, int8_t * restrict out, int n, int m, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c index 13eee2157e0..a7e067e9b39 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c @@ -32,4 +32,4 @@ void f (int8_t * restrict in, int8_t * restrict out, int n, int m, int cond) } /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c index 06f57dc6e52..20e0e4d867f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c @@ -16,4 +16,4 @@ void f (int8_t *base, int8_t *out, size_t m, size_t n) { } /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c index 29ce79a4c06..5b79594f9fa 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c @@ -16,4 +16,4 @@ void f (int8_t *base, int8_t *out, size_t m, size_t n) { } /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-Os" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c index 3d3d71815fd..1ed03555c19 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c @@ -17,6 +17,6 @@ void f (void * restrict in, void * restrict out, int l, int n, int m, size_t vl) } } -/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ -/* { dg-final { scan-assembler-times {add\s+\s*[a-x0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+\s+ble\s+[a-x0-9]+,\s*zero,\.L[0-9]+\s+vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-g" no-opts "-funroll-loops" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-flto" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c index fb20a547d47..d1611ddf345 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c @@ -35,5 +35,5 @@ void f2 (int32_t * restrict in, int32_t * restrict in2, int32_t * restrict out, } } -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c index a5ffd27b3df..3e89cfc107b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c @@ -26,5 +26,5 @@ void f2 (int32_t * restrict in, int32_t * restrict in2, int32_t * restrict out, } } -/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */