[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] test: Block slp-16.c check for target support vect_strided6

[Jeff Law <law@gcc.gnu.org>]

https://gcc.gnu.org/g:e3982be71495f70635694494a640311a1796f2f7

commit e3982be71495f70635694494a640311a1796f2f7
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Fri Sep 15 17:03:49 2023 +0800

    test: Block slp-16.c check for target support vect_strided6
    
    This testcase FAIL in RISC-V because RISC-V support vect_load_lanes with 6.
    FAIL: gcc.dg/vect/slp-16.c -flto -ffat-lto-objects  scan-tree-dump-times vect "vectorizing stmts using SLP" 2
    FAIL: gcc.dg/vect/slp-16.c scan-tree-dump-times vect "vectorizing stmts using SLP" 2
    
    Since it use vlseg6 (vect_load_lanes with array size = 6)
    
    gcc/testsuite/ChangeLog:
    
            * gcc.dg/vect/slp-16.c: Block vect_strided6.
            * lib/target-supports.exp: Add strided type.
    
    (cherry picked from commit 9b80311cdc685e6f27cf4f8625ac3d24dcc59d7f)

Diff:
---
 gcc/testsuite/gcc.dg/vect/slp-16.c    | 2 +-
 gcc/testsuite/lib/target-supports.exp | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/vect/slp-16.c b/gcc/testsuite/gcc.dg/vect/slp-16.c
index a7da9932c54..ae6b2d66ce5 100644
--- a/gcc/testsuite/gcc.dg/vect/slp-16.c
+++ b/gcc/testsuite/gcc.dg/vect/slp-16.c
@@ -66,5 +66,5 @@ int main (void)
 }
 
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_int_mult } } } */
-/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_int_mult } } } */
+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target { vect_int_mult && {! vect_strided6 } } } } } */
   
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 5c43b7bc593..82f9d04ec36 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8530,7 +8530,7 @@ proc check_effective_target_vect_interleave { } {
 		 && [check_effective_target_s390_vx]) }}]
 }
 
-foreach N {2 3 4 8} {
+foreach N {2 3 4 5 6 7 8} {
     eval [string map [list N $N] {
 	# Return 1 if the target supports 2-vector interleaving
 	proc check_effective_target_vect_stridedN { } {