From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2119) id 8AA733857357; Mon, 18 Sep 2023 18:27:36 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8AA733857357 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1695061656; bh=+VSzzV6PV94UHFmaSPofk4x2bkEZOynxAGt8fDvXic0=; h=From:To:Subject:Date:From; b=OsmHzNiaEhn/NvOG6g12tbWv064Nj00mCAAbPgNhUlSEOLSAx6ylvFz0OxbERIsrd KfRNJ4+jJ9E4PqififSC0Cd7Vk++BwHRnt5Nf0kiVYRiPjI4O5j5KqCAPt9iG2cff2 jQezvzjAGFqua0H5XPVpqkzdyMKc9GEISSaKPzOo= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Jeff Law To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Support FP SGNJX autovec for VLS mode X-Act-Checkin: gcc X-Git-Author: Pan Li X-Git-Refname: refs/vendors/riscv/heads/gcc-13-with-riscv-opts X-Git-Oldrev: b81cf20475ea81573f2e9eae30a583de26432b54 X-Git-Newrev: c9022ba34f49db7cb78ff7741d04d2538c616d72 Message-Id: <20230918182736.8AA733857357@sourceware.org> Date: Mon, 18 Sep 2023 18:27:36 +0000 (GMT) List-Id: https://gcc.gnu.org/g:c9022ba34f49db7cb78ff7741d04d2538c616d72 commit c9022ba34f49db7cb78ff7741d04d2538c616d72 Author: Pan Li Date: Fri Sep 15 20:57:20 2023 +0800 RISC-V: Support FP SGNJX autovec for VLS mode This patch would like to allow the VLS mode autovec for the floating-point binary operation SGNJX. Give sample code as below: void test (float * restrict out, float * restrict in1, float * restrict in2) { for (int i = 0; i < 128; i++) out[i] = in1[i] * copysignf (1.0, in2[i]); } Before this patch: test: li a5,128 vsetvli zero,a5,e32,m1,ta,ma vle32.v v2,0(a1) lui a4,%hi(.LC0) flw fa5,%lo(.LC0)(a4) vfmv.v.f v1,fa5 vle32.v v3,0(a2) vfsgnj.vv v1,v1,v3 vfmul.vv v1,v1,v2 vse32.v v1,0(a0) ret After this patch: test: li a5,128 vsetvli zero,a5,e32,m1,ta,ma vle32.v v1,0(a1) vle32.v v2,0(a2) vfsgnjx.vv v1,v1,v2 vse32.v v1,0(a0) ret This SGNJX autovec acts on function call copysignf/copysignf in math.h too. And it depends on the option -ffast-math. gcc/ChangeLog: * config/riscv/autovec-vls.md (xorsign3): New pattern. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls/def.h: New macro. * gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-1.c: New test. * gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c: New test. Signed-off-by: Pan Li (cherry picked from commit 23224f06c980533d474b3a29d2437e5537916fc0) Diff: --- gcc/config/riscv/autovec-vls.md | 21 +++++++++++ .../gcc.target/riscv/rvv/autovec/vls/def.h | 8 ++++ .../riscv/rvv/autovec/vls/floating-point-sgnjx-1.c | 43 ++++++++++++++++++++++ .../riscv/rvv/autovec/vls/floating-point-sgnjx-2.c | 31 ++++++++++++++++ 4 files changed, 103 insertions(+) diff --git a/gcc/config/riscv/autovec-vls.md b/gcc/config/riscv/autovec-vls.md index 6f48f7d6232..d4ed2081537 100644 --- a/gcc/config/riscv/autovec-vls.md +++ b/gcc/config/riscv/autovec-vls.md @@ -289,6 +289,27 @@ [(set_attr "type" "vector")] ) +;; ------------------------------------------------------------------------- +;; Includes: +;; - vfsgnjx.vv +;; - vfsgnjx.vf +;; ------------------------------------------------------------------------- +(define_insn_and_split "xorsign3" + [(set (match_operand:VLSF 0 "register_operand") + (unspec:VLSF + [(match_operand:VLSF 1 "register_operand") + (match_operand:VLSF 2 "register_operand")] UNSPEC_VXORSIGN))] + "TARGET_VECTOR && can_create_pseudo_p ()" + "#" + "&& 1" + [(const_int 0)] + { + riscv_vector::emit_vlmax_insn (code_for_pred (UNSPEC_VXORSIGN, mode), + riscv_vector::BINARY_OP, operands); + DONE; + } +) + ;; ------------------------------------------------------------------------------- ;; ---- [INT] Unary operations ;; ------------------------------------------------------------------------------- diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/def.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/def.h index 1edc1910920..81c4570836b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/def.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/def.h @@ -258,3 +258,11 @@ typedef double v512df __attribute__ ((vector_size (4096))); for (int i = 0; i < NUM; ++i) \ a[i] = (b[i] > c[i]) OP (d[i] < e[i]); \ } + +#define DEF_SGNJX_VV(PREFIX, NUM, TYPE, CALL) \ + void __attribute__ ((noinline, noclone)) \ + PREFIX##_##TYPE##NUM (TYPE *restrict a, TYPE *restrict b, TYPE *restrict c) \ + { \ + for (int i = 0; i < NUM; ++i) \ + a[i] = b[i] * CALL (1.0, c[i]); \ + } diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-1.c new file mode 100644 index 00000000000..86c23ef0436 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-1.c @@ -0,0 +1,43 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */ + +#include "def.h" + +DEF_SGNJX_VV (sgnj, 1, _Float16, __builtin_copysignf16) +DEF_SGNJX_VV (sgnj, 2, _Float16, __builtin_copysignf16) +DEF_SGNJX_VV (sgnj, 4, _Float16, __builtin_copysignf16) +DEF_SGNJX_VV (sgnj, 8, _Float16, __builtin_copysignf16) +DEF_SGNJX_VV (sgnj, 16, _Float16, __builtin_copysignf16) +DEF_SGNJX_VV (sgnj, 32, _Float16, __builtin_copysignf16) +DEF_SGNJX_VV (sgnj, 64, _Float16, __builtin_copysignf16) +DEF_SGNJX_VV (sgnj, 128, _Float16, __builtin_copysignf16) +DEF_SGNJX_VV (sgnj, 256, _Float16, __builtin_copysignf16) +DEF_SGNJX_VV (sgnj, 512, _Float16, __builtin_copysignf16) +DEF_SGNJX_VV (sgnj, 1024, _Float16, __builtin_copysignf16) +DEF_SGNJX_VV (sgnj, 2048, _Float16, __builtin_copysignf16) + +DEF_SGNJX_VV (sgnj, 1, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 2, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 4, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 8, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 16, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 32, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 64, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 128, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 256, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 512, float, __builtin_copysignf) +DEF_SGNJX_VV (sgnj, 1024, float, __builtin_copysignf) + +DEF_SGNJX_VV (sgnj, 1, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 2, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 4, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 8, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 16, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 32, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 64, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 128, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 256, double, __builtin_copysign) +DEF_SGNJX_VV (sgnj, 512, double, __builtin_copysign) + +/* { dg-final { scan-assembler-times {vfsgnjx\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 30 } } */ +/* { dg-final { scan-assembler-not {csrr} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c new file mode 100644 index 00000000000..7e017de6a25 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2 --param=riscv-autovec-lmul=m8 -ffast-math" } */ + +#include "def.h" +#include + +DEF_SGNJX_VV (sgnj, 1, float, copysignf) +DEF_SGNJX_VV (sgnj, 2, float, copysignf) +DEF_SGNJX_VV (sgnj, 4, float, copysignf) +DEF_SGNJX_VV (sgnj, 8, float, copysignf) +DEF_SGNJX_VV (sgnj, 16, float, copysignf) +DEF_SGNJX_VV (sgnj, 32, float, copysignf) +DEF_SGNJX_VV (sgnj, 64, float, copysignf) +DEF_SGNJX_VV (sgnj, 128, float, copysignf) +DEF_SGNJX_VV (sgnj, 256, float, copysignf) +DEF_SGNJX_VV (sgnj, 512, float, copysignf) +DEF_SGNJX_VV (sgnj, 1024, float, copysignf) + +DEF_SGNJX_VV (sgnj, 1, double, copysign) +DEF_SGNJX_VV (sgnj, 2, double, copysign) +DEF_SGNJX_VV (sgnj, 4, double, copysign) +DEF_SGNJX_VV (sgnj, 8, double, copysign) +DEF_SGNJX_VV (sgnj, 16, double, copysign) +DEF_SGNJX_VV (sgnj, 32, double, copysign) +DEF_SGNJX_VV (sgnj, 64, double, copysign) +DEF_SGNJX_VV (sgnj, 128, double, copysign) +DEF_SGNJX_VV (sgnj, 256, double, copysign) +DEF_SGNJX_VV (sgnj, 512, double, copysign) + +/* { dg-final { scan-assembler-times {vfsgnjx\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 19 } } */ +/* { dg-final { scan-assembler-not {csrr} } } */