From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2119) id 7B3363858426; Mon, 18 Sep 2023 18:28:42 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7B3363858426 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1695061722; bh=9sYzDu+kbvghYcYzIX5abDChqx946VZWqQlx3h5BnZY=; h=From:To:Subject:Date:From; b=nu7ge1m5Vcpef4QvuLY1pjrKaEC7gSWcdZLBufZpWpboUNlrC3oZietMPNwMJA3MM qR+1JxBgIRDSb7Un+QV2wqju0LMi0PKTl9GqFUebpdL5Yd8T/3X1Nmg6xOgnXrgqTK Gjz0+RGqJ8bCA43Agk+cTbevy5dEm/VaELHRPNu4= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Jeff Law To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Remove redundant vec_duplicate pattern X-Act-Checkin: gcc X-Git-Author: Juzhe-Zhong X-Git-Refname: refs/vendors/riscv/heads/gcc-13-with-riscv-opts X-Git-Oldrev: ad953241bd79ac64891c09726a163d05db0ec23a X-Git-Newrev: fd9c44be778b11d16575bb8727ae88bef6486f1c Message-Id: <20230918182842.7B3363858426@sourceware.org> Date: Mon, 18 Sep 2023 18:28:42 +0000 (GMT) List-Id: https://gcc.gnu.org/g:fd9c44be778b11d16575bb8727ae88bef6486f1c commit fd9c44be778b11d16575bb8727ae88bef6486f1c Author: Juzhe-Zhong Date: Mon Sep 18 20:35:08 2023 +0800 RISC-V: Remove redundant vec_duplicate pattern Currently, VLS and VLA patterns are different. VLA is define_expand VLS is define_insn_and_split It makes no sense that they are different pattern format. Merge them into same pattern (define_insn_and_split). It can also be helpful for the future vv -> vx fwprop optimization. gcc/ChangeLog: * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests. * config/riscv/vector.md (@vec_duplicate): Remove. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr111313.c: Adapt test. (cherry picked from commit 4260f4af4dde6dbf85c28da7e8aaf03985b3d171) Diff: --- gcc/config/riscv/riscv-selftests.cc | 4 ++-- gcc/config/riscv/vector.md | 18 +++--------------- gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111313.c | 4 ++-- 3 files changed, 7 insertions(+), 19 deletions(-) diff --git a/gcc/config/riscv/riscv-selftests.cc b/gcc/config/riscv/riscv-selftests.cc index b16b5c15286..cdc863ee4f7 100644 --- a/gcc/config/riscv/riscv-selftests.cc +++ b/gcc/config/riscv/riscv-selftests.cc @@ -343,7 +343,7 @@ run_broadcast_selftests (void) rtx mem = gen_rtx_MEM (inner_mode, addr); \ expand_vector_broadcast (mode, mem); \ insn = get_last_insn (); \ - src = XEXP (SET_SRC (PATTERN (insn)), 1); \ + src = SET_SRC (PATTERN (insn)); \ ASSERT_TRUE (MEM_P (XEXP (src, 0))); \ ASSERT_TRUE ( \ rtx_equal_p (src, gen_rtx_VEC_DUPLICATE (mode, XEXP (src, 0)))); \ @@ -353,7 +353,7 @@ run_broadcast_selftests (void) rtx reg = gen_reg_rtx (inner_mode); \ expand_vector_broadcast (mode, reg); \ insn = get_last_insn (); \ - src = XEXP (SET_SRC (PATTERN (insn)), 1); \ + src = SET_SRC (PATTERN (insn)); \ ASSERT_TRUE (REG_P (XEXP (src, 0))); \ ASSERT_TRUE ( \ rtx_equal_p (src, gen_rtx_VEC_DUPLICATE (mode, XEXP (src, 0)))); \ diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md index 39b550c1bff..6d3c43e05ee 100644 --- a/gcc/config/riscv/vector.md +++ b/gcc/config/riscv/vector.md @@ -1371,22 +1371,10 @@ ;; This pattern only handles duplicates of non-constant inputs. ;; Constant vectors go through the movm pattern instead. ;; So "direct_broadcast_operand" can only be mem or reg, no CONSTANT. -(define_expand "@vec_duplicate" - [(set (match_operand:V 0 "register_operand") - (vec_duplicate:V - (match_operand: 1 "direct_broadcast_operand")))] - "TARGET_VECTOR" - { - riscv_vector::emit_vlmax_insn (code_for_pred_broadcast (mode), - riscv_vector::UNARY_OP, operands); - DONE; - } -) - (define_insn_and_split "@vec_duplicate" - [(set (match_operand:VLS 0 "register_operand") - (vec_duplicate:VLS - (match_operand: 1 "reg_or_int_operand")))] + [(set (match_operand:V_VLS 0 "register_operand") + (vec_duplicate:V_VLS + (match_operand: 1 "direct_broadcast_operand")))] "TARGET_VECTOR && can_create_pseudo_p ()" "#" "&& 1" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111313.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111313.c index 1da1b8ce6fb..1e01cfefd47 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111313.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111313.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=scalable -O3" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=scalable -O3 -fno-schedule-insns -fno-schedule-insns2" } */ #define K 32 short in[2*K][K]; @@ -17,4 +17,4 @@ foo () } } -/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vmv\.v\.x} 1 } } */