[gcc r14-4117] Daily bump.

[gcc r14-4117] Daily bump.

[GCC Administrator]

https://gcc.gnu.org/g:6b78e9a59bee35ea55a23f5b06d504b09d60258f

commit r14-4117-g6b78e9a59bee35ea55a23f5b06d504b09d60258f
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Tue Sep 19 00:17:49 2023 +0000

    Daily bump.

Diff:
---
 ChangeLog               |   4 +
 gcc/ChangeLog           | 120 +++++++++++++++++++++++++++++
 gcc/DATESTAMP           |   2 +-
 gcc/cp/ChangeLog        |  49 ++++++++++++
 gcc/testsuite/ChangeLog | 199 ++++++++++++++++++++++++++++++++++++++++++++++++
 libgomp/ChangeLog       |   6 ++
 libstdc++-v3/ChangeLog  |  39 ++++++++++
 7 files changed, 418 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index 87ffdb270f4..d7ffaa7a91f 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,7 @@
+2023-09-18  Fei Gao  <gaofei@eswincomputing.com>
+
+	* MAINTAINERS: Add myself.
+
 2023-09-15  Yang Yujie  <yangyujie@loongson.cn>
 
 	* config-ml.in: Remove unneeded loongarch clause.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5a78b1672f3..347b1ad811c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,123 @@
+2023-09-18  Pan Li  <pan2.li@intel.com>
+
+	* config/riscv/autovec.md: Extend to vls mode.
+
+2023-09-18  Pan Li  <pan2.li@intel.com>
+
+	* config/riscv/autovec.md: Bugfix.
+	* config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
+
+2023-09-18  Andrew Pinski  <apinski@marvell.com>
+
+	PR tree-optimization/111442
+	* match.pd (zero_one_valued_p): Have the bit_and match not be
+	recursive.
+
+2023-09-18  Andrew Pinski  <apinski@marvell.com>
+
+	PR tree-optimization/111435
+	* match.pd (zero_one_valued_p): Don't do recursion
+	on converts.
+
+2023-09-18  Iain Sandoe  <iain@sandoe.co.uk>
+
+	* config/darwin-protos.h (enum darwin_external_toolchain): New.
+	* config/darwin.cc (DSYMUTIL_VERSION): New.
+	(darwin_override_options): Choose the default debug DWARF version
+	depending on the configured dsymutil version.
+
+2023-09-18  Iain Sandoe  <iain@sandoe.co.uk>
+
+	* configure: Regenerate.
+	* configure.ac: Handle explict disable of stdlib option, set
+	defaults for Darwin.
+
+2023-09-18  Andrew Pinski  <apinski@marvell.com>
+
+	PR tree-optimization/111431
+	* match.pd (`(a == CST) & a`): New pattern.
+
+2023-09-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
+	* config/riscv/vector.md (@vec_duplicate<mode>): Remove.
+
+2023-09-18  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+
+	PR target/105928
+	* config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
+	Add support for immediates using shifted ORR/BIC.
+	(aarch64_split_dimode_const_store): Apply if we save one instruction.
+	* config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
+	Make pattern global.
+
+2023-09-18  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+
+	* config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
+	(neoverse-v1): Place before zeus.
+	(neoverse-v2): Place before demeter.
+	* config/aarch64/aarch64-tune.md: Regenerate.
+
+2023-09-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/autovec.md: Add VLS modes.
+	* config/riscv/vector-iterators.md: Ditto.
+	* config/riscv/vector.md: Ditto.
+
+2023-09-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
+	* config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
+
+2023-09-18  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/111294
+	* tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
+	Remove
+	(back_threader::find_paths_to_names): Adjust.
+	(back_threader::maybe_thread_block): Likewise.
+	(back_threader_profitability::possibly_profitable_path_p): Remove
+	code applying extra costs to copies PHIs.
+
+2023-09-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/autovec.md: Extend VLS modes.
+	* config/riscv/vector.md: Ditto.
+
+2023-09-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/vector.md (mov<mode>): New pattern.
+	(*mov<mode>_mem_to_mem): Ditto.
+	(*mov<mode>): Ditto.
+	(@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
+	(*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
+	(*mov<mode>_vls): Ditto.
+	(movmisalign<mode>): Ditto.
+	(@vec_duplicate<mode>): Ditto.
+	* config/riscv/autovec-vls.md: Removed.
+
+2023-09-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	PR target/111153
+	* config/riscv/autovec.md: Add VLS modes.
+
+2023-09-18  Jason Merrill  <jason@redhat.com>
+
+	* doc/gty.texi: Add discussion of cache vs. deletable.
+
+2023-09-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
+	(copysign<mode>3): Ditto.
+	(xorsign<mode>3): Ditto.
+	(<optab><mode>2): Ditto.
+	* config/riscv/autovec.md: Extend VLS modes.
+
+2023-09-18  Jiufu Guo  <guojiufu@linux.ibm.com>
+
+	PR middle-end/111303
+	* match.pd ((t * 2) / 2): Update pattern.
+
 2023-09-17  Ajit Kumar Agarwal  <aagarwa1@linux.ibm.com>
 
 	* config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 844ee2ed37f..6820ee3dc6b 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20230918
+20230919
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index ea73753a640..e028fcee94a 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,52 @@
+2023-09-18  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/89231
+	* pt.cc (try_class_unification): Strengthen TI_TEMPLATE equality
+	test by not calling most_general_template.  Only unify the
+	innermost levels of template arguments.
+	(unify) <case CLASS_TYPE>: Only unify the innermost levels of
+	template arguments, and only if the template is primary.
+
+2023-09-18  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/63198
+	PR c++/18474
+	* semantics.cc (maybe_convert_cond): Look through implicit
+	INDIRECT_REF when deciding whether to issue a -Wparentheses
+	warning, and consider templated assignment expressions as well.
+	(finish_parenthesized_expr): Look through implicit INDIRECT_REF
+	when suppressing -Wparentheses warning.
+	* typeck.cc (build_x_modify_expr): Check simple assignments
+	ahead time too, not just compound assignments.  Give the second
+	operand of MODOP_EXPR a non-null type so that it's not considered
+	always instantiation-dependent.  Don't call suppress_warning.
+
+2023-09-18  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/108347
+	* pt.cc (unify): Return unify_success for identical dependent
+	DECL_P 'arg' and 'parm'.
+	<case CONST_DECL>: Remove handling.
+
+2023-09-18  Patrick Palka  <ppalka@redhat.com>
+
+	* call.cc (add_template_candidate_real): Check arity even
+	when there are no explicit template arguments.  Combine the
+	two adjacent '!obj' tests into one.
+
+2023-09-18  Patrick Palka  <ppalka@redhat.com>
+
+	* pt.cc (register_specialization): Remove now-unnecessary
+	early exit for FUNCTION_DECL partial instantiation.
+	(tsubst_template_decl): Pass use_spec_table=false to
+	tsubst_function_decl.  Set DECL_TI_ARGS of a non-lambda
+	FUNCTION_DECL specialization to the full set of arguments.
+	Simplify register_specialization call accordingly.
+
+2023-09-18  Jason Merrill  <jason@redhat.com>
+
+	* class.cc (check_subobject_offset): Use similar_type_p.
+
 2023-09-12  Jason Merrill  <jason@redhat.com>
 
 	PR c++/111357
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 9bf6b2905da..d2999cef6bd 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,202 @@
+2023-09-18  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/autovec/vls/def.h: New macros.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-10.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-11.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-12.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-13.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-14.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-15.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-16.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-17.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-18.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-19.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-20.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-21.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-22.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-3.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-4.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-5.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-6.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-7.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-8.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/vec-set-9.c: New test.
+
+2023-09-18  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/base/scalar-move-merged-run-1.c: New test.
+
+2023-09-18  Andrew Pinski  <apinski@marvell.com>
+
+	PR tree-optimization/111442
+	* gcc.c-torture/compile/pr111442-1.c: New test.
+
+2023-09-18  Andrew Pinski  <apinski@marvell.com>
+
+	PR tree-optimization/111435
+	* gcc.c-torture/compile/pr111435-1.c: New test.
+
+2023-09-18  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/89231
+	* g++.dg/cpp0x/variadic-partial3.C: New test.
+
+2023-09-18  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/63198
+	PR c++/18474
+	* g++.dg/cpp0x/static_assert15.C: Expect diagnostic for
+	non-constant static_assert condition.
+	* g++.dg/expr/unary2.C: Remove xfails.
+	* g++.dg/template/init7.C: Make initializer type-dependent to
+	preserve intent of test.
+	* g++.dg/template/recurse3.C: Likewise for the erroneous
+	statement.
+	* g++.dg/template/non-dependent26.C: New test.
+	* g++.dg/warn/Wparentheses-32.C: New test.
+
+2023-09-18  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/108347
+	* g++.dg/template/ttp41.C: New test.
+
+2023-09-18  Patrick Palka  <ppalka@redhat.com>
+
+	* g++.dg/cpp0x/vt-57397-1.C: Expect "candidate expects ... N
+	argument(s)" at the declaration site instead of the call site.
+	* g++.dg/cpp0x/vt-57397-2.C: Likewise.
+	* g++.dg/overload/template5.C: Likewise.
+	* g++.dg/template/local6.C: Likewise.
+	* g++.dg/template/conv20.C: New test.
+	* g++.dg/template/ttp40.C: New test.
+
+2023-09-18  Patrick Palka  <ppalka@redhat.com>
+
+	* g++.dg/template/nontype12.C: Expect two instead of three
+	duplicate diagnostics for A<double>::bar() specialization.
+
+2023-09-18  Andrew Pinski  <apinski@marvell.com>
+
+	PR tree-optimization/111431
+	* gcc.dg/binop-notand1a.c: Remove xfail.
+	* gcc.dg/binop-notand4a.c: Likewise.
+	* gcc.c-torture/execute/pr111431-1.c: New test.
+	* gcc.dg/binop-andeq1.c: New test.
+	* gcc.dg/binop-andeq2.c: New test.
+	* gcc.dg/binop-notand7.c: New test.
+	* gcc.dg/binop-notand7a.c: New test.
+
+2023-09-18  Thomas Schwinge  <thomas@codesourcery.com>
+
+	* g++.dg/abi/nvptx-nrv1.C: Move...
+	* g++.target/nvptx/abi-nrv1.C: ... here.
+	* g++.dg/abi/nvptx-ptrmem1.C: Move...
+	* g++.target/nvptx/abi-ptrmem1.C: ... here.
+
+2023-09-18  Thomas Schwinge  <thomas@codesourcery.com>
+
+	* g++.target/nvptx/nvptx.exp: New.
+
+2023-09-18  Thomas Schwinge  <thomas@codesourcery.com>
+
+	* g++.dg/abi/nvptx-ptrmem1.C: Fix up.
+
+2023-09-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/autovec/pr111313.c: Adapt test.
+
+2023-09-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/vsetvl/avl_single-21.c: Adapt test.
+	* gcc.target/riscv/rvv/vsetvl/avl_single-26.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/avl_single-39.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/avl_single-41.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/avl_single-6.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c: Ditto.
+
+2023-09-18  Lehua Ding  <lehua.ding@rivai.ai>
+
+	* gcc.target/riscv/rvv/autovec/vls/div-1.c: Removed comments.
+	* gcc.target/riscv/rvv/autovec/vls/shift-3.c: Ditto.
+
+2023-09-18  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+
+	PR target/105928
+	* gcc.target/aarch64/pr105928.c: Add new test.
+	* gcc.target/aarch64/vect-cse-codegen.c: Fix test.
+
+2023-09-18  Lehua Ding  <lehua.ding@rivai.ai>
+
+	PR target/111255
+	* gcc.target/riscv/rvv/vsetvl/pr111255.c: New test.
+
+2023-09-18  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/111294
+	* gcc.dg/tree-ssa/pr111294.c: New test.
+	* gcc.dg/tree-ssa/phi_on_compare-4.c: Adjust.
+	* gcc.dg/tree-ssa/pr59597.c: Likewise.
+	* gcc.dg/tree-ssa/pr61839_2.c: Likewise.
+	* gcc.dg/tree-ssa/ssa-sink-18.c: Likewise.
+	* g++.dg/warn/Wstringop-overflow-4.C: XFAIL subtest on ilp32.
+	* gcc.dg/uninit-pred-9_b.c: XFAIL subtest everywhere.
+	* gcc.dg/vect/vect-117.c: Make scan for not Invalid sum
+	conditional on lp64.
+
+2023-09-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/autovec/vls/def.h: Add VLS vec_init tests.
+	* gcc.target/riscv/rvv/autovec/vls/init-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/init-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/init-3.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/init-4.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/init-5.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/init-6.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/init-7.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/repeat-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/repeat-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/repeat-3.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/repeat-4.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/repeat-5.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/repeat-6.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/repeat-7.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/repeat-8.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/repeat-9.c: New test.
+
+2023-09-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	PR target/111153
+	* gcc.target/riscv/rvv/autovec/vls/def.h: Add VLS mode reduction case.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-10.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-11.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-12.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-13.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-14.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-15.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-16.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-17.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-18.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-19.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-20.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-21.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-3.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-4.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-5.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-6.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-7.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-8.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/reduc-9.c: New test.
+
+2023-09-18  Jiufu Guo  <guojiufu@linux.ibm.com>
+
+	PR middle-end/111303
+	* gcc.dg/tree-ssa/pr111303.c: New test.
+
 2023-09-17  Andrew Pinski  <apinski@marvell.com>
 
 	* gcc.dg/tree-ssa/20040204-1.c: Remove xfail.
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index 9de28eb4ce9..840574a8cac 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,9 @@
+2023-09-18  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/111294
+	* team.c (gomp_team_start): Assert alloca size to avoid false
+	positive alloc-size diagnostic.
+
 2023-09-12  Thomas Schwinge  <thomas@codesourcery.com>
 	    Chung-Lin Tang  <cltang@codesourcery.com>
 
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 6ed7ddb7080..768a36f1ae7 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,42 @@
+2023-09-18  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/63198
+	PR c++/18474
+	* testsuite/26_numerics/random/discard_block_engine/cons/seed_seq2.cc:
+	Make data member seed_seq::called mutable.
+	* testsuite/26_numerics/random/independent_bits_engine/cons/seed_seq2.cc:
+	Likewise.
+	* testsuite/26_numerics/random/linear_congruential_engine/cons/seed_seq2.cc:
+	Likewise.
+	* testsuite/26_numerics/random/mersenne_twister_engine/cons/seed_seq2.cc:
+	Likewise.
+	* testsuite/26_numerics/random/shuffle_order_engine/cons/seed_seq2.cc:
+	Likewise.
+	* testsuite/26_numerics/random/subtract_with_carry_engine/cons/seed_seq2.cc:
+	Likewise.
+	* testsuite/ext/random/simd_fast_mersenne_twister_engine/cons/seed_seq2.cc:
+	Likewise.
+
+2023-09-18  Jonathan Wakely  <jwakely@redhat.com>
+
+	* doc/xml/manual/status_cxx2020.xml: Tweak P1466R3 status.
+	* doc/html/manual/status.html: Regenerate.
+
+2023-09-18  Jonathan Wakely  <jwakely@redhat.com>
+
+	* doc/xml/manual/configure.xml: Use conventional option name.
+	* doc/xml/manual/status_cxx2020.xml: Update.
+	* doc/xml/manual/status_cxx2023.xml: Update.
+	* doc/html/*: Regenerate.
+
+2023-09-18  Jonathan Wakely  <jwakely@redhat.com>
+
+	* doc/xml/manual/intro.xml: Clarify that building libstdc++
+	separately from GCC is not supported.
+	* doc/xml/manual/prerequisites.xml: Note msgfmt prerequisite for
+	testing.
+	* doc/html/manual/setup.html: Regenerate.
+
 2023-09-15  Jonathan Wakely  <jwakely@redhat.com>
 
 	* testsuite/29_atomics/atomic_ref/wait_notify.cc: Do not