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From: Tsukasa OI <a4lg@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r14-4119] RISC-V: Fix typos on comments (SVE -> RVV)
Date: Tue, 19 Sep 2023 02:47:48 +0000 (GMT)	[thread overview]
Message-ID: <20230919024748.750953858D32@sourceware.org> (raw)

https://gcc.gnu.org/g:7f4fc87086b5ad57edaaf628ba6cb92649d14453

commit r14-4119-g7f4fc87086b5ad57edaaf628ba6cb92649d14453
Author: Tsukasa OI <research_trasio@irq.a4lg.com>
Date:   Tue Sep 19 02:10:31 2023 +0000

    RISC-V: Fix typos on comments (SVE -> RVV)
    
    We have the 'V' extension (RVV), not SVE from AArch64.
    
    gcc/ChangeLog:
    
            * config/riscv/riscv-vector-builtins.cc
            (builtin_decl, expand_builtin): Replace SVE with RVV.

Diff:
---
 gcc/config/riscv/riscv-vector-builtins.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc
index 5318651138a..5d4dc264fa6 100644
--- a/gcc/config/riscv/riscv-vector-builtins.cc
+++ b/gcc/config/riscv/riscv-vector-builtins.cc
@@ -4172,7 +4172,7 @@ builtin_decl (unsigned int code, bool)
   return (*registered_functions)[code]->decl;
 }
 
-/* Attempt to fold STMT, given that it's a call to the SVE function
+/* Attempt to fold STMT, given that it's a call to the RVV function
    with subcode CODE.  Return the new statement on success and null
    on failure.  Insert any other new statements at GSI.  */
 gimple *
@@ -4192,7 +4192,7 @@ expand_builtin (unsigned int code, tree exp, rtx target)
   return function_expander (rfn.instance, rfn.decl, exp, target).expand ();
 }
 
-/* Perform any semantic checks needed for a call to the SVE function
+/* Perform any semantic checks needed for a call to the RVV function
    with subcode CODE, such as testing for integer constant expressions.
    The call occurs at location LOCATION and has NARGS arguments,
    given by ARGS.  FNDECL is the original function decl, before

                 reply	other threads:[~2023-09-19  2:47 UTC|newest]

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