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* [gcc r14-4232] Daily bump.
@ 2023-09-23  0:18 GCC Administrator
  0 siblings, 0 replies; only message in thread
From: GCC Administrator @ 2023-09-23  0:18 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:f72591c84f762ddeb0de7b240b1d2442073a06fd

commit r14-4232-gf72591c84f762ddeb0de7b240b1d2442073a06fd
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Sat Sep 23 00:18:20 2023 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           |  60 +++++++++++++++++++
 gcc/DATESTAMP           |   2 +-
 gcc/cp/ChangeLog        |  31 ++++++++++
 gcc/testsuite/ChangeLog | 151 ++++++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 243 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index feb9d38f78f..71a936ce01c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,63 @@
+2023-09-22  Pan Li  <pan2.li@intel.com>
+
+	* config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
+	(emit_vec_float_cmp_mask): Rename.
+	(expand_vec_copysign): Ditto.
+	(emit_vec_copysign): Ditto.
+	(emit_vec_abs): New function impl.
+	(emit_vec_cvt_x_f): Ditto.
+	(emit_vec_cvt_f_x): Ditto.
+	(expand_vec_ceil): Ditto.
+
+2023-09-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/vector-iterators.md: Extend VLS modes.
+
+2023-09-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
+	* config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
+	(vec_duplicate<mode>): Ditto.
+
+2023-09-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/autovec.md: Add VLS conditional patterns.
+	* config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
+	(expand_cond_binop): Ditto.
+	(expand_cond_ternop): Ditto.
+	* config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
+	(expand_cond_binop): Ditto.
+	(expand_cond_ternop): Ditto.
+
+2023-09-22  xuli  <xuli1@eswincomputing.com>
+
+	PR target/111451
+	* config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
+							into vrgatherei16.vv.
+
+2023-09-22  Lehua Ding  <lehua.ding@rivai.ai>
+
+	* config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
+	New combine patterns.
+	* config/riscv/riscv-protos.h (enum insn_type): New insn_type.
+
+2023-09-22  Lehua Ding  <lehua.ding@rivai.ai>
+
+	* config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
+	* config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
+
+2023-09-22  Pan Li  <pan2.li@intel.com>
+
+	* config/riscv/autovec.md (ceil<mode>2): New pattern.
+	* config/riscv/riscv-protos.h (enum insn_flags): New enum type.
+	(enum insn_type): Ditto.
+	(expand_vec_ceil): New function decl.
+	* config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
+	(expand_vec_float_cmp_mask): Ditto.
+	(expand_vec_copysign): Ditto.
+	(expand_vec_ceil): Ditto.
+	* config/riscv/vector.md: Add VLS mode support.
+
 2023-09-21  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 
 	* config/riscv/autovec.md: Extend VLS modes.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 064340569dc..8534e68bd2d 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20230922
+20230923
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 66adfcd8274..34f20b2a6a9 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,34 @@
+2023-09-22  Jason Merrill  <jason@redhat.com>
+
+	PR c++/111357
+	* pt.cc (expand_integer_pack): Use IMPLICIT_CONV_EXPR.
+
+2023-09-22  Jason Merrill  <jason@redhat.com>
+
+	* constexpr.cc (free_constructor): Handle null ce->value.
+
+2023-09-22  Jason Merrill  <jason@redhat.com>
+
+	PR c++/111529
+	* parser.cc (cp_parser_lambda_declarator_opt): Don't suggest
+	-std=c++14 for lambda templates.
+	* pt.cc (tsubst_expr): Move ANNOTATE_EXPR handling...
+	(tsubst_copy_and_build): ...here.
+
+2023-09-22  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/111493
+	* decl2.cc (grok_array_decl): Guard diagnostic and backward
+	compatibility fallback code paths with tf_error.
+
+2023-09-22  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/111485
+	* pt.cc (is_compatible_template_arg): New parameter 'args'.
+	Add the outer template arguments 'args' to 'new_args'.
+	(convert_template_argument): Pass 'args' to
+	is_compatible_template_arg.
+
 2023-09-20  Jakub Jelinek  <jakub@redhat.com>
 
 	* parser.cc (cp_parser_postfix_expression): Parse
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 00dcf1b18c2..8ce4312545c 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,154 @@
+2023-09-22  Jason Merrill  <jason@redhat.com>
+
+	* g++.dg/cpp2a/constexpr-union7.C: New test.
+
+2023-09-22  Jason Merrill  <jason@redhat.com>
+
+	PR c++/111529
+	* g++.dg/ext/unroll-4.C: New test.
+
+2023-09-22  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/autovec/unop/math-ceil-0.c: Adjust body check.
+	* gcc.target/riscv/rvv/autovec/unop/math-ceil-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/unop/math-ceil-2.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/unop/math-ceil-3.c: Ditto.
+
+2023-09-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/autovec/vls/def.h: Add VLS modes.
+	* gcc.target/riscv/rvv/autovec/vls/wfma-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wfma-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wfma-3.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wfms-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wfnma-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wfnms-1.c: New test.
+
+2023-09-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/autovec/vls/def.h: Add VLS modes cond tests.
+	* gcc.target/riscv/rvv/autovec/vls/wadd-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wadd-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wadd-3.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wadd-4.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wmul-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wmul-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wmul-3.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wsub-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wsub-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wsub-3.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/wsub-4.c: New test.
+
+2023-09-22  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/111493
+	* g++.dg/cpp23/subscript15.C: New test.
+
+2023-09-22  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/111485
+	* g++.dg/cpp2a/concepts-ttp5.C: New test.
+	* g++.dg/cpp2a/concepts-ttp6.C: New test.
+
+2023-09-22  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/autovec/math-ceil-0.c: Moved to...
+	* gcc.target/riscv/rvv/autovec/unop/math-ceil-0.c: ...here.
+	* gcc.target/riscv/rvv/autovec/math-ceil-1.c: Moved to...
+	* gcc.target/riscv/rvv/autovec/unop/math-ceil-1.c: ...here.
+	* gcc.target/riscv/rvv/autovec/math-ceil-2.c: Moved to...
+	* gcc.target/riscv/rvv/autovec/unop/math-ceil-2.c: ...here.
+	* gcc.target/riscv/rvv/autovec/math-ceil-3.c: Moved to...
+	* gcc.target/riscv/rvv/autovec/unop/math-ceil-3.c: ...here.
+	* gcc.target/riscv/rvv/autovec/math-ceil-run-0.c: Moved to...
+	* gcc.target/riscv/rvv/autovec/unop/math-ceil-run-0.c: ...here.
+	* gcc.target/riscv/rvv/autovec/math-ceil-run-1.c: Moved to...
+	* gcc.target/riscv/rvv/autovec/unop/math-ceil-run-1.c: ...here.
+	* gcc.target/riscv/rvv/autovec/math-ceil-run-2.c: Moved to...
+	* gcc.target/riscv/rvv/autovec/unop/math-ceil-run-2.c: ...here.
+	* gcc.target/riscv/rvv/autovec/test-math.h: Moved to...
+	* gcc.target/riscv/rvv/autovec/unop/test-math.h: ...here.
+
+2023-09-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/autovec/vls/def.h: Add VLS conditional tests.
+	* gcc.target/riscv/rvv/autovec/vls/cond_add-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_add-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_and-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_div-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_div-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_fma-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_fma-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_fms-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_fnma-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_fnma-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_fnms-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_ior-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_max-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_max-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_min-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_min-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_mod-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_mul-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_mul-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_neg-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_neg-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_not-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_shift-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_shift-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_sub-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_sub-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/vls/cond_xor-1.c: New test.
+
+2023-09-22  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/autovec/test-math.h: Rename.
+	* gcc.target/riscv/rvv/autovec/math-ceil-0.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/math-ceil-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/math-ceil-2.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/math-ceil-3.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/math-ceil-run-0.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/math-ceil-run-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/math-ceil-run-2.c: Ditto.
+
+2023-09-22  xuli  <xuli1@eswincomputing.com>
+
+	PR target/111451
+	* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-4.c: Adjust case.
+	* gcc.target/riscv/rvv/autovec/vls/perm-4.c: Ditto.
+
+2023-09-22  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/autovec/math-ceil-run-0.c: Remove arch and abi.
+	* gcc.target/riscv/rvv/autovec/math-ceil-run-1.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/math-ceil-run-2.c: Ditto.
+
+2023-09-22  Lehua Ding  <lehua.ding@rivai.ai>
+
+	* gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/cond/cond_widen_reduc_run-2.c: New test.
+
+2023-09-22  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c:
+	Remove reference to math.h.
+	* gcc.target/riscv/rvv/autovec/vls/floating-point-min-5.c: Ditto.
+	* gcc.target/riscv/rvv/autovec/vls/floating-point-sgnjx-2.c: Ditto.
+
+2023-09-22  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/autovec/math-ceil-0.c: New test.
+	* gcc.target/riscv/rvv/autovec/math-ceil-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/math-ceil-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/math-ceil-3.c: New test.
+	* gcc.target/riscv/rvv/autovec/math-ceil-run-0.c: New test.
+	* gcc.target/riscv/rvv/autovec/math-ceil-run-1.c: New test.
+	* gcc.target/riscv/rvv/autovec/math-ceil-run-2.c: New test.
+	* gcc.target/riscv/rvv/autovec/test-math.h: New test.
+	* gcc.target/riscv/rvv/autovec/vls/math-ceil-1.c: New test.
+
 2023-09-21  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 
 	* gcc.target/riscv/rvv/autovec/vls/abs-2.c: New test.

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