From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 7EB9E3861917; Fri, 29 Sep 2023 04:38:18 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7EB9E3861917 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1695962298; bh=dP+VB6YCvbH/CxTfK1T+JIJMUp77szcWYwkafzP4Gi4=; h=From:To:Subject:Date:From; b=wzizkw0UxcCXh5e0q9bCtyyvbgAk2Sy70xpjBlaHLxawbTfz2rY7yBl/+q4m7yWFn Q34DDq9G72fTnJyv9pFEGZr64EoKUdq+rHm4J2nSEm6ho6Etfi4BobCYroMQhiW8N4 dS+wn2g++mI8vX7C1t3LUZ2NMUwFaeUjF3433900= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work137)] Replace UNSPEC_COPYSIGN with copysign RTL X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work137 X-Git-Oldrev: 4139cff61d542ff13e4e4bd8d18a4ccbf49e83a4 X-Git-Newrev: 2fdd2ac4f5e377fead85265b6eb0f1245edaa3b3 Message-Id: <20230929043818.7EB9E3861917@sourceware.org> Date: Fri, 29 Sep 2023 04:38:18 +0000 (GMT) List-Id: https://gcc.gnu.org/g:2fdd2ac4f5e377fead85265b6eb0f1245edaa3b3 commit 2fdd2ac4f5e377fead85265b6eb0f1245edaa3b3 Author: Michael Meissner Date: Fri Sep 29 00:36:54 2023 -0400 Replace UNSPEC_COPYSIGN with copysign RTL When I first implemented COPYSIGN support in the power7 days, we did not have a copysign RTL insn, so I had to use UNSPEC to represent the copysign instruction. This patch removes those UNSPECs, and it uses the native RTL copysign insn. 2023-09-29 Michael Meissner gcc/ * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete. (copysign3_fcpsg): Use copysign RTL instead of UNSPEC. (copysign3_hard): Likewise. (copysign3_soft): Likewise. * config/rs6000/vector.md (vector_copysign3): Use copysign RTL instead of UNSPEC. * config/rs6000/vsx.md (vsx_copysign3): Use copysign RTL instead of UNSPEC. Diff: --- gcc/config/rs6000/rs6000.md | 20 ++++++++------------ gcc/config/rs6000/vector.md | 4 ++-- gcc/config/rs6000/vsx.md | 7 +++---- 3 files changed, 13 insertions(+), 18 deletions(-) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 7b583d7a69a..1b6b6cb5bbe 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -108,7 +108,6 @@ UNSPEC_TOCREL UNSPEC_MACHOPIC_OFFSET UNSPEC_BPERM - UNSPEC_COPYSIGN UNSPEC_PARITY UNSPEC_CMPB UNSPEC_FCTIW @@ -5383,9 +5382,8 @@ ;; compiler from optimizing -0.0 (define_insn "copysign3_fcpsgn" [(set (match_operand:SFDF 0 "gpc_reg_operand" "=d,wa") - (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "d,wa") - (match_operand:SFDF 2 "gpc_reg_operand" "d,wa")] - UNSPEC_COPYSIGN))] + (copysign:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "d,wa") + (match_operand:SFDF 2 "gpc_reg_operand" "d,wa")))] "TARGET_HARD_FLOAT && (TARGET_CMPB || VECTOR_UNIT_VSX_P (mode))" "@ fcpsgn %0,%2,%1 @@ -14984,10 +14982,9 @@ (define_insn "copysign3_hard" [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v") - (unspec:IEEE128 - [(match_operand:IEEE128 1 "altivec_register_operand" "v") - (match_operand:IEEE128 2 "altivec_register_operand" "v")] - UNSPEC_COPYSIGN))] + (copysign:IEEE128 + (match_operand:IEEE128 1 "altivec_register_operand" "v") + (match_operand:IEEE128 2 "altivec_register_operand" "v")))] "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (mode)" "xscpsgnqp %0,%2,%1" [(set_attr "type" "vecmove") @@ -14995,10 +14992,9 @@ (define_insn "copysign3_soft" [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v") - (unspec:IEEE128 - [(match_operand:IEEE128 1 "altivec_register_operand" "v") - (match_operand:IEEE128 2 "altivec_register_operand" "v")] - UNSPEC_COPYSIGN)) + (copysign:IEEE128 + (match_operand:IEEE128 1 "altivec_register_operand" "v") + (match_operand:IEEE128 2 "altivec_register_operand" "v"))) (clobber (match_scratch:IEEE128 3 "=&v"))] "!TARGET_FLOAT128_HW && FLOAT128_IEEE_P (mode)" "xscpsgndp %x3,%x2,%x1\;xxpermdi %x0,%x3,%x1,1" diff --git a/gcc/config/rs6000/vector.md b/gcc/config/rs6000/vector.md index 1ae04c8e0a8..f4fc620b653 100644 --- a/gcc/config/rs6000/vector.md +++ b/gcc/config/rs6000/vector.md @@ -332,8 +332,8 @@ (define_expand "vector_copysign3" [(set (match_operand:VEC_F 0 "vfloat_operand") - (unspec:VEC_F [(match_operand:VEC_F 1 "vfloat_operand") - (match_operand:VEC_F 2 "vfloat_operand")] UNSPEC_COPYSIGN))] + (copysign:VEC_F (match_operand:VEC_F 1 "vfloat_operand") + (match_operand:VEC_F 2 "vfloat_operand")))] "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" { if (mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (mode)) diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 4de41e78d51..f3b40229094 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -2233,10 +2233,9 @@ ;; Copy sign (define_insn "vsx_copysign3" [(set (match_operand:VSX_F 0 "vsx_register_operand" "=wa") - (unspec:VSX_F - [(match_operand:VSX_F 1 "vsx_register_operand" "wa") - (match_operand:VSX_F 2 "vsx_register_operand" "wa")] - UNSPEC_COPYSIGN))] + (copysign:VSX_F + (match_operand:VSX_F 1 "vsx_register_operand" "wa") + (match_operand:VSX_F 2 "vsx_register_operand" "wa")))] "VECTOR_UNIT_VSX_P (mode)" "xvcpsgnp %x0,%x2,%x1" [(set_attr "type" "")])