From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2093) id 20DA43858D1E; Fri, 13 Oct 2023 03:53:42 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 20DA43858D1E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1697169222; bh=P8w0cClCWeY6GoRO7hfp6FEynnwbaIQ0Ir4+rYzJxmk=; h=From:To:Subject:Date:From; b=OXQFRTt4GD7TCHiQtv9Apn1WG+3XNx7lbzlZ1j9ifhD5ahpiieieb7VucAmYsN0km esiRe1G24xCYIL65SOEr56i/XWnN9JSeyCxWsswaMno9w9S9DGbEL0TqdeVVhlz8LY 0YWzVFQpTM7+ebFYnu+D0Ui0UWRTD74+yoLKdjww= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kito Cheng To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-4607] RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512. X-Act-Checkin: gcc X-Git-Author: Kito Cheng X-Git-Refname: refs/heads/master X-Git-Oldrev: f0b05073bd3f0e5c8e55ef5a6fd16aa4518956a4 X-Git-Newrev: 0f40e59f193f96f1bb0fa3e1c2d160567ed29b32 Message-Id: <20231013035342.20DA43858D1E@sourceware.org> Date: Fri, 13 Oct 2023 03:53:42 +0000 (GMT) List-Id: https://gcc.gnu.org/g:0f40e59f193f96f1bb0fa3e1c2d160567ed29b32 commit r14-4607-g0f40e59f193f96f1bb0fa3e1c2d160567ed29b32 Author: Kito Cheng Date: Tue Oct 3 10:27:24 2023 +0800 RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512. riscv_legitimize_poly_move was expected to ensure the poly value is at most 32 times smaller than the minimal VLEN (32 being derived from '4096 / 128'). This assumption held when our mode modeling was not so precisely defined. However, now that we have modeled the mode size according to the correct minimal VLEN info, the size difference between different RVV modes can be up to 64 times. For instance, comparing RVVMF64BI and RVVMF1BI, the sizes are [1, 1] versus [64, 64] respectively. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_legitimize_poly_move): Bump max_power to 64. * config/riscv/riscv.h (MAX_POLY_VARIANT): New. gcc/testsuite/ChangeLog: * g++.target/riscv/rvv/autovec/bug-01.C: New. * g++.target/riscv/rvv/rvv.exp: Add autovec folder. Diff: --- gcc/config/riscv/riscv.cc | 5 ++-- gcc/config/riscv/riscv.h | 5 ++++ .../g++.target/riscv/rvv/autovec/bug-01.C | 33 ++++++++++++++++++++++ gcc/testsuite/g++.target/riscv/rvv/rvv.exp | 3 ++ 4 files changed, 43 insertions(+), 3 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 66a55a73cb5..44746256f61 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -2404,9 +2404,8 @@ riscv_legitimize_poly_move (machine_mode mode, rtx dest, rtx tmp, rtx src) } else { - /* FIXME: We currently DON'T support TARGET_MIN_VLEN > 4096. */ - int max_power = exact_log2 (4096 / 128); - for (int i = 0; i < max_power; i++) + int max_power = exact_log2 (MAX_POLY_VARIANT); + for (int i = 0; i <= max_power; i++) { int possible_div_factor = 1 << i; if (factor % (vlenb / possible_div_factor) == 0) diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h index f43ff10bc83..01645141935 100644 --- a/gcc/config/riscv/riscv.h +++ b/gcc/config/riscv/riscv.h @@ -1191,4 +1191,9 @@ extern void riscv_remove_unneeded_save_restore_calls (void); #define OPTIMIZE_MODE_SWITCHING(ENTITY) (TARGET_VECTOR) #define NUM_MODES_FOR_MODE_SWITCHING {VXRM_MODE_NONE, riscv_vector::FRM_NONE} + +/* The size difference between different RVV modes can be up to 64 times. + e.g. RVVMF64BI vs RVVMF1BI on zvl512b, which is [1, 1] vs [64, 64]. */ +#define MAX_POLY_VARIANT 64 + #endif /* ! GCC_RISCV_H */ diff --git a/gcc/testsuite/g++.target/riscv/rvv/autovec/bug-01.C b/gcc/testsuite/g++.target/riscv/rvv/autovec/bug-01.C new file mode 100644 index 00000000000..fd10009ddbe --- /dev/null +++ b/gcc/testsuite/g++.target/riscv/rvv/autovec/bug-01.C @@ -0,0 +1,33 @@ +/* { dg-options "-march=rv64gcv_zvl512b -mabi=lp64d -O3" } */ + +class c { +public: + int e(); + void j(); +}; +float *d; +class k { + int f; + +public: + k(int m) : f(m) {} + float g; + float h; + void n(int m) { + for (int i; i < m; i++) { + d[0] = d[1] = d[2] = g; + d[3] = h; + d += f; + } + } +}; +c l; +void o() { + int b = l.e(); + k a(b); + for (;;) + if (b == 4) { + l.j(); + a.n(2); + } +} diff --git a/gcc/testsuite/g++.target/riscv/rvv/rvv.exp b/gcc/testsuite/g++.target/riscv/rvv/rvv.exp index 249530580d7..c30d6e93144 100644 --- a/gcc/testsuite/g++.target/riscv/rvv/rvv.exp +++ b/gcc/testsuite/g++.target/riscv/rvv/rvv.exp @@ -40,5 +40,8 @@ set CFLAGS "-march=$gcc_march -O3" dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/base/*.C]] \ "" $CFLAGS +dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/*.\[C\]]] \ + "" $CFLAGS + # All done. dg-finish