From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 01421385C6E8; Mon, 16 Oct 2023 18:24:37 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 01421385C6E8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1697480677; bh=qYUi5nCdamE2Hf0VE7JbiYtwtlXAfjnzt7JDh5w5ZbU=; h=From:To:Subject:Date:From; b=bYC39Zq4tmlz44vdjGb7YkdFgYNDOYm1QWSIwr11QHVyGBv7ziSvamfZHxvVbIIBY XsoWavVmS+bv9DEXM4dbtEPgKcPdO/GWCpW8uJYrJPTYgxzUs/yabbT2ufeNrtej08 KfjtkdqDWk+ywOL1OgjLR+BPaHmMlisMjXMxKYyY= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work139)] Update ChangeLog.meissner X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work139 X-Git-Oldrev: 3867e6aeda3a54c0cdc4b9bf7e80d7edadd174d9 X-Git-Newrev: 6583f68a903b344645f41569754fe33f606900fd Message-Id: <20231016182437.01421385C6E8@sourceware.org> Date: Mon, 16 Oct 2023 18:24:37 +0000 (GMT) List-Id: https://gcc.gnu.org/g:6583f68a903b344645f41569754fe33f606900fd commit 6583f68a903b344645f41569754fe33f606900fd Author: Michael Meissner Date: Thu Oct 12 16:46:25 2023 -0400 Update ChangeLog.meissner Diff: --- gcc/ChangeLog.meissner | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index 8e8937d08cd2..12fb7862fe65 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,8 +1,4 @@ -<<<<<<< HEAD ==================== Branch work139, patch #3 ==================== -======= -==================== Branch work139, patch #2 ==================== ->>>>>>> c58761b70f6 (Update ChangeLog.meissner) Power10: Add options to disable load and store vector pair. @@ -16,7 +12,6 @@ option would tell GCC to generate two load vector instructions instead of a single load vector pair. The -mno-store-vector-pair option would tell GCC to generate two store vector instructions instead of a single store vector pair. -<<<<<<< HEAD If either -mno-load-vector-pair is used, GCC will not generate the indexed stxvpx instruction. Similarly if -mno-store-vector-pair is used, GCC will not generate the indexed lxvpx instruction. The reason for this is to enable @@ -29,17 +24,6 @@ vector pair are enabled. I decided that if the user explicitly used the __builtin_vsx_lxvp or the __builtin_vsx_stxvp built-in functions to load or store a vector pair, that those functions would always generate a vector pair instruction. -======= -| commit 8f1a70a4fbcc6441c70da60d4ef6db1e5635e18a (HEAD) -| Author: Jiufu Guo -| Date: Tue Jan 10 20:52:33 2023 +0800 -| -| rs6000: build constant via li/lis;rldicl/rldicr -| -| If a constant is possible left/right cleaned on a rotated value from -| a negative value of "li/lis". Then, using "li/lis ; rldicl/rldicr" -| to build the constant. ->>>>>>> c58761b70f6 (Update ChangeLog.meissner) I added code so that the user code modify these settings using either a '#pragma GCC target' directive or used __attribute__((__target__(...))) in the @@ -80,9 +64,9 @@ gcc/testsuite/ * gcc.target/powerpc/vector-pair-switch3.c: New test. * gcc.target/powerpc/vector-pair-switch4.c: New test. -==================== Branch work139, patch #2 applied to trunk ==================== +==================== Branch work139, patch #2 was reverted ==================== -==================== Branch work139, patch #1 was reverted ==================== +==================== Branch work139, patch #1 was applied to the trunk ==================== ==================== Branch work139, baseline ====================