From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id C876D3858C54; Mon, 16 Oct 2023 18:39:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C876D3858C54 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1697481590; bh=c8qPOrO3DVetiA5tMEwdAl5FtrfkWvHmVjbUNzI5qbA=; h=From:To:Subject:Date:From; b=qWJMdkUFppp+DW2gpJuQaCvHL2AXE5v3flx8PmVfZWkb2N1lfUnpGEP6Ackm41GiJ nGGoPz0b+I4yiZZZfcDaNYclL7cvhh1eR0NJDihppTeeLssp0W2h80wF2ButmS8v2v oVzQvgSzzh+aYKyfPfgaxPfUI22ktd7Erp4VqPCk= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc/meissner/heads/work139-vsubreg] (79 commits) Merge commit 'refs/users/meissner/heads/work139-vsubreg' of X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work139-vsubreg X-Git-Oldrev: 23efe34b6c78a9d57a35b8eeeeb23bfd5ed2d8e5 X-Git-Newrev: 416282a280d408e4118301687eac16051d7028c3 Message-Id: <20231016183950.C876D3858C54@sourceware.org> Date: Mon, 16 Oct 2023 18:39:50 +0000 (GMT) List-Id: The branch 'meissner/heads/work139-vsubreg' was updated to point to: 416282a280d4... Merge commit 'refs/users/meissner/heads/work139-vsubreg' of It previously pointed to: 23efe34b6c78... Merge commit 'refs/users/meissner/heads/work139-vsubreg' of Diff: Summary of changes (added commits): ----------------------------------- 416282a... Merge commit 'refs/users/meissner/heads/work139-vsubreg' of 19933eb... Add ChangeLog.vsubreg and update REVISION. b9fc9ca... Update ChangeLog.meissner (*) 6583f68... Update ChangeLog.meissner (*) 3867e6a... Update ChangeLog.meissner (*) 66c36ae... Update ChangeLog.meissner (*) 6b89ca6... PowerPC: Do not depend on an undefined shift (*) 9ec55df... Add ChangeLog.meissner and REVISION. (*) 9e12217... Update ChangeLog.meissner (*) 4eef7bb... Power10: Add options to disable load and store vector pair. (*) 388cde8... Update ChangeLog.meissner (*) 3615670... PowerPC: Do not depend on an undefined shift (*) f2a90e4... Revert patches (*) 39d18e7... Update ChangeLog.meissner (*) 232f13c... PowerPC: Do not depend on an undefined shift (*) 05f2069... Add ChangeLog.meissner and REVISION. (*) 964fd40... d: Merge upstream dmd, druntime 4c18eed967, phobos d945686a (*) c7609ac... MATCH: Improve `A CMP 0 ? A : -A` set of patterns to use bi (*) 29a4453... [PR31531] MATCH: Improve ~a < ~b and ~a < CST, allow a nop (*) 7550130... c++: improve fold-expr location (*) a22eeac... c++: fix truncated diagnostic in C++23 [PR111272] (*) 817a701... ARC: Split asl dst,1,src into bset dst,0,src to implement 1 (*) d6ebe61... s390: Fix expander popcountv8hi2_vx (*) a5fe9f0... RISC-V: Use VLS modes if the NITERS is known and smaller th (*) b7a28c0... use more get_range_query (*) e6d0630... Support 32/64-bit vectorization for conversion between _Flo (*) 96f12b9... Enable vectorization for V2HF/V4HF rounding operations and (*) d5cfabc... Daily bump. (*) 643a522... libgomp.texi: Update "Enabling OpenMP" + OpenACC / invoke.t (*) 67f5d36... libgomp.texi: Improve "OpenACC Environment Variables" (*) 15886c0... libgomp.texi: Use present not future tense (*) ade39f9... sim: add distclean dep for gnulib (*) accccbf... middle-end: Improved RTL expansion of 1LL << x. (*) 5c46cd8... modula2: Add m2.etags rule to gcc/m2/Make-lang.in (*) 3bcc10b... wide-int: Fix estimation of buffer sizes for wide_int print (*) ac90823... d: Merge upstream dmd, druntime f9efc98fd7, phobos a3f22129 (*) 648d307... combine: Fix handling of unsigned constants (*) 77faa3e... RISC-V: Fix vsingle attribute (*) b3cb98d... Daily bump. (*) fd6b17a... libgomp.fortran/allocate-6.f90: Run with -fdump-tree-gimple (*) 578afbc... Fix ICE in set_cell_span, at text-art/table.cc:148 with D f (*) 06d8aee... d: Reduce code duplication of writing generated files. (*) bc238c4... libgomp.texi: Note to 'Memory allocation' sect and missing (*) 969f5c3... Fortran: Support OpenMP's 'allocate' directive for stack va (*) cb01192... middle-end: Allow _BitInt(65535) [PR102989] (*) 78dd49f... RISC-V: Remove redundant iterators. (*) 300d7d3... Daily bump. (*) d78fef5... Fortran: name conflict between internal procedure and deriv (*) 458c253... fortran: fix handling of options -ffpe-trap and -ffpe-summa (*) 8be20f3... Do not add partial equivalences with no uses. (*) 3179ad7... OMP SIMD inbranch call vectorization for AVX512 style masks (*) 63eaccd... Add support for SLP vectorization of OpenMP SIMD clone call (*) 8544efd... RISC-V Regression: Fix FAIL of bb-slp-68.c for RVV (*) 9a82cca... RISC-V: Refine run test cases of math autovec (*) 8c5447a... RISC-V: Add test for FP llfloor auto vectorization (*) 9d67561... RISC-V: Add test for FP ifloor auto vectorization (*) 2943c50... RISC-V: Add test for FP iceil auto vectorization (*) ad0bac8... RISC-V: Add test for FP llceil auto vectorization (*) 24eaada... C99 testsuite readiness: Some verified test case adjustment (*) 0fef2c8... C99 test suite readiness: Some unverified test case adjustm (*) 1c23bfd... C99 test suite readiness: Mark some C89 tests (*) cf611de... or1k: Fix -Wincompatible-pointer-types warning during libgc (*) dab4f3e... arc: Fix -Wincompatible-pointer-types warning during libgcc (*) fbd3923... riscv: Fix -Wincompatible-pointer-types warning during libg (*) 6e5216e... csky: Fix -Wincompatible-pointer-types warning during libgc (*) bdbca40... m68k: Avoid implicit function declaration in libgcc (*) badb798... libstdc++: Fix tr1/8_c_compatibility/cstdio/functions.cc re (*) 6decda1... tree-optimization/111779 - Handle some BIT_FIELD_REFs in SR (*) 35b5bb4... tree-optimization/111773 - avoid CD-DCE of noreturn special (*) 6b58056... RISC-V: Add test for FP llround auto vectorization (*) 2a89656... RISC-V Regression: Fix FAIL of bb-slp-pr69907.c for RVV (*) d53d20a... RISC-V: Add test for FP iroundf auto vectorization (*) 0f40e59... RISC-V: Fix the riscv_legitimize_poly_move issue on targets (*) f0b0507... RISC-V: Leverage stdint-gcc.h for RVV test cases (*) 8f52040... RISC-V: Support FP lfloor/lfloorf auto vectorization (*) ba0cde8... testsuite: Replace many dg-require-thread-fence with dg-req (*) 2a4d9e4... testsuite: Add dg-require-atomic-cmpxchg-word (*) f9ef2e6... Daily bump. (*) 51f7bfa... RISC-V: Support FP lceil/lceilf auto vectorization (*) (*) This commit already exists in another branch. Because the reference `refs/users/meissner/heads/work139-vsubreg' matches your hooks.email-new-commits-only configuration, no separate email is sent for this commit.