From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 1ADF23858423; Tue, 17 Oct 2023 05:24:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1ADF23858423 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1697520271; bh=JGyU/z5OT6jvdlCXyQIei1TFQ71CfWVs4vG04u5CN2o=; h=From:To:Subject:Date:From; b=L5vuYqByvbGAr6e/Z8e7X6HxpNCJrV4bcp77quY8GMOzSmrUs9sKh6VavFIXRPi8N NO6oaSw6W2Hv30r7DxzirsQ/mqXMNF6ritx3dhvC4aDMHUsZ6QE1q3vpSuxV/stAQB si6AlXYwU5a5e61n5/NlT5u05JzAHzEjNFwaBup8= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work139-vsubreg)] Update ChangeLog.vsubreg X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work139-vsubreg X-Git-Oldrev: 8e09d3c0c7719db83ba74b84fd17e446657bda33 X-Git-Newrev: d9ff6eccac44c3ec1681e189df24c96e74cb587b Message-Id: <20231017052431.1ADF23858423@sourceware.org> Date: Tue, 17 Oct 2023 05:24:31 +0000 (GMT) List-Id: https://gcc.gnu.org/g:d9ff6eccac44c3ec1681e189df24c96e74cb587b commit d9ff6eccac44c3ec1681e189df24c96e74cb587b Author: Michael Meissner Date: Tue Oct 17 01:24:27 2023 -0400 Update ChangeLog.vsubreg Diff: --- gcc/ChangeLog.vsubreg | 138 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 138 insertions(+) diff --git a/gcc/ChangeLog.vsubreg b/gcc/ChangeLog.vsubreg index 1abb48dd50cd..435d0582a78f 100644 --- a/gcc/ChangeLog.vsubreg +++ b/gcc/ChangeLog.vsubreg @@ -1,5 +1,143 @@ +==================== Branch work139-vsubreg, patch #402 ==================== + +Add support for -mvector-size-32. + +(vsize137 patches #300 and #301). + +2023-09-28 Michael Meissner + +gcc/ + + * config/rs6000/predicates.md (const_0_to_31_operand): New predicate. + * config/rs6000/rs6000-c.cc (rs6000_cpu_cpp_builtins): Define + __VECTOR_SIZE_32__ if -mvector-size-32 was used. + * config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Add + -mvector-size-32. + (POWERPC_MASKS): Likewise. + * config/rs6000/rs6000-protos.h (vector_pair_to_vector_mode): New + declaration. + (rs6000_adjust_for_vector_pair): Likewise. + (split_unary_vector_pair): Likewise. + (split_binary_vector_pair): Likewise. + (split_fma_vector_pair): Likewise. + * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Add + support for 32-byte vector types created with -mvector-size-32. + (rs6000_modes_tieable_p): Make all 32-byte vectors tie with other + 32-byte vectors. + (rs6000_debug_reg_global): If -mdebug=reg, print whether + -mvector-size-32 was enabled. + (rs6000_init_hard_regno_mode_ok): Add support for 32-byte vectors. + (rs6000_option_override_internal): Add checking for -mvector-size-32. + (rs6000_opt_masks): Add -mvector-size-32. + (rs6000_expand_vector_extract): Add support for 32-byte vectors. + (reg_offset_addressing_ok_p): Likewise. + (rs6000_emit_move): Likewise. + (rs6000_preferred_reload_class): Likewise. + (vector_pair_to_vector_mode): New vector pair helper function. + (rs6000_adjust_for_vector_pair): Likewise. + (rs6000_split_vpair_constan): Likewise. + (split_unary_vector_pair): Likewise. + (split_binary_vector_pair): Likewise. + (split_fma_vector_pair): Likewise. + (rs6000_split_multireg_move): Add support for 32-byte vectors. + * config/rs6000/rs6000.h (VECTOR_PAIR_MODE): New macro. + * config/rs6000/rs6000.md (wd attribute): Add 32-byte vector modes. + (RELOAD): Likewise. + (toplevel): Include vector-pair.md. + * config/rs6000/rs6000.opt (-mvector-size-32): New option. + * config/rs6000/t-rs6000 (MD_INCLUDES): Add vector-pair.md. + * config/rs6000/vector-pair.md: New file. + * config/rs6000/vector.md (VEC_base): Add 32-byte vector modes. + * config/rs6000/vsx.md (VSX_EXTRACT_PREDICATE): Likewise. + (VSX_EX): Likewise. + (VPAIR_V4DI_V4DF): New mode iterator. + (VPAIR_VECTOR): New mode attribute. + (vpair_vector): Likewise. + (vsx_extract_, VPAIR_V4DF_V4DI iterator): New extract insn for + vector pair support. + (vsx_extract_v8sf): Likewise. + (vsx_extract_, VPAIR_SMALL_INT iterator): Likewise. + +gcc/testsuite/ + + * gcc.target/powerpc/vector-size-32-1.c: New test. + * gcc.target/powerpc/vector-size-32-2.c: New test. + * gcc.target/powerpc/vector-size-32-3.c: New test. + * gcc.target/powerpc/vector-size-32-4.c: New test. + * gcc.target/powerpc/vector-size-32-5.c: New test. + * gcc.target/powerpc/vector-size-32-6.c: New test. + +==================== Branch work139-vsubreg, patch #401 ==================== + +Add support for vector pair built-in functions. + +(vpair137 patch #200). + +2023-09-29 Michael Meissner + +gcc/ + + * config/rs6000/predicates.md (mma_assemble_input_operand): Allow other + 16-byte vectors and not just V16QImode. + * config/rs6000/rs6000-builtins.def (__builtin_vpair_*): Add vector pair + built-in functions. + * config/rs6000/rs6000-protos.h (split_unary_vector_pair): Add + declaration. + (split_binary_vector_pair): Likewise. + (split_fma_vector_pair): Likewise. + * config/rs6000/rs6000.cc (split_unary_vector_pair): New helper function + for vector pair built-in functions. + (split_binary_vector_pair): Likewise. + (split_fma_vector_pair): Likewise. + * config/rs6000/rs6000.md (toplevel): Include vector-pair.md. + * config/rs6000/t-rs6000 (MD_INCLUDES): Add vector-pair.md. + * config/rs6000/vector-pair.md: New file. + * doc/extend.texi (PowerPC Vector Pair Built-in Functions): Document the + vector pair built-in functions. + +gcc/testsuite/ + + * gcc.target/powerpc/vector-pair-01.c: New test. + * gcc.target/powerpc/vector-pair-02.c: New test. + * gcc.target/powerpc/vector-pair-03.c: New test. + * gcc.target/powerpc/vector-pair-04.c: New test. + * gcc.target/powerpc/vector-pair-05.c: New test. + * gcc.target/powerpc/vector-pair-06.c: New test. + * gcc.target/powerpc/vector-pair-07.c: New test. + * gcc.target/powerpc/vector-pair-08.c: New test. + +==================== Branch work139-vsubreg, patch #400 ==================== + +Peter's patches for subreg support. + +2023-09-21 Peter Bergner + +gcc/ + + PR target/109116 + * gcc/config/rs6000/rs6000.cc (rs6000_modes_tieable_p): Make OOmdoe + tieable with 128-bit vector modes. + +2023-09-15 Peter Bergner + +gcc/ + + PR target/109116 + * gcc/config/rs6000/mma.md (vsx_disassemble_pair): Use SUBREG's instead + of UNSPEC's. + (mma_disassemble_acc): Likewise. + ==================== Branch work139-vsubreg, baseline ==================== +Add ChangeLog.vsubreg and update REVISION. + +2023-09-29 Michael Meissner + +gcc/ + + * ChangeLog.vsubreg: New file for branch. + * REVISION: Update. + 2023-10-11 Michael Meissner Clone branch