From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id B3C463858D32; Thu, 16 Nov 2023 20:15:59 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B3C463858D32 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1700165759; bh=CnJSef0zG3YBJ1vGH9j6BO0n6peartiotnPws8pArgQ=; h=From:To:Subject:Date:From; b=j4fld6ywmbTzFcLiEplyGXTtDGsivYMq5XpuwvZ4/oQP2Ko5fA2aSDYRDhOMDM8dq 0Bc/tG3XHqIIjTm1NvAAoA5ynmI8MoMpTaQ1aJFlELb04lpNeEIqbnqVycwKPaowT0 nw9BAn0JUKtUtXIv55UEwAOyEBODugVQyIOh3TIM= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work144-vsize)] Rework vector pair extract. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work144-vsize X-Git-Oldrev: cd1fc3cec0a00d866d807bd13ec3bc15d29346aa X-Git-Newrev: 1c7a497482f216a5a98e366b3157eb824601722c Message-Id: <20231116201559.B3C463858D32@sourceware.org> Date: Thu, 16 Nov 2023 20:15:59 +0000 (GMT) List-Id: https://gcc.gnu.org/g:1c7a497482f216a5a98e366b3157eb824601722c commit 1c7a497482f216a5a98e366b3157eb824601722c Author: Michael Meissner Date: Thu Nov 16 15:15:41 2023 -0500 Rework vector pair extract. 2023-11-16 Michael Meissner gcc/ * config/rs6000/rs6000-protos.h (rs6000_expand_vector_pair_extract): Delete. * config/rs6000/rs6000.cc (rs6000_expand_vector_pair_extract): Delete. * config/rs6000/vector-pair.md (vec_extract): Rework. Diff: --- gcc/config/rs6000/rs6000-protos.h | 1 - gcc/config/rs6000/rs6000.cc | 9 --------- gcc/config/rs6000/vector-pair.md | 29 +++++++++++++++++++++++------ 3 files changed, 23 insertions(+), 16 deletions(-) diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index af5c2ebd822..b0fde773e33 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -65,7 +65,6 @@ extern void rs6000_expand_vector_pair_init (rtx, rtx); extern void rs6000_expand_vector_set (rtx, rtx, rtx); extern void rs6000_expand_vector_pair_set (rtx, rtx, rtx); extern void rs6000_expand_vector_extract (rtx, rtx, rtx); -extern void rs6000_expand_vector_pair_extract (rtx, rtx, rtx); extern void rs6000_split_vec_extract_var (rtx, rtx, rtx, rtx, rtx); extern rtx rs6000_adjust_vec_address (rtx, rtx, rtx, rtx, machine_mode); extern void altivec_expand_vec_perm_le (rtx op[4]); diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index da96359474f..5058ed06347 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -7846,15 +7846,6 @@ rs6000_expand_vector_extract (rtx target, rtx vec, rtx elt) } } -/* Extract field ELT from VEC into TARGET. */ - -void -rs6000_expand_vector_pair_extract (rtx target, rtx vec, rtx elt) -{ - if (target || vec || elt) - gcc_unreachable (); -} - /* Return the offset within a memory object (MEM) of a vector type to a given element within the vector (ELEMENT) with an element size (SCALAR_SIZE). If the element is constant, we return a constant integer. diff --git a/gcc/config/rs6000/vector-pair.md b/gcc/config/rs6000/vector-pair.md index 13fcb5e3d01..d83bdcb209b 100644 --- a/gcc/config/rs6000/vector-pair.md +++ b/gcc/config/rs6000/vector-pair.md @@ -117,7 +117,7 @@ (set_attr "length" "*,8,*,8,8,8") (set_attr "isa" "lxvp,*,stxvp,*,*,*")]) -;; Vector initialization, set, extract +;; Vector pair initialization (define_expand "vec_init" [(match_operand:VPAIR 0 "vlogical_operand") (match_operand:VPAIR 1 "")] @@ -127,6 +127,7 @@ DONE; }) +;; Vector pair set element (define_expand "vec_set" [(match_operand:VPAIR 0 "vlogical_operand") (match_operand: 1 "register_operand") @@ -137,13 +138,29 @@ DONE; }) -(define_expand "vec_extract" - [(match_operand: 0 "register_operand") - (match_operand:VPAIR 1 "vlogical_operand") - (match_operand 2 "const_int_operand")] +;; Vector pair extraction +(define_insn_and_split "vec_extract" + [(set (match_operand: 0 "vsx_register_operand" "=wa") + (vec_select: + (match_operand:VPAIR 1 "vsx_register_operand" "wa") + (parallel [(match_operand:QI 2 "const_int_operand" "n")])))] "TARGET_MMA && TARGET_VECTOR_SIZE_32" + "#" + "&& reload_completed" + [(const_int 0)] { - rs6000_expand_vector_pair_extract (operands[0], operands[1], operands[2]); + rtx op0 = operands[0]; + rtx op1 = operands[1]; + HOST_WIDE_INT elt = INTVAL (operands[2]); + machine_mode mode = mode; + machine_mode vmode = mode; + unsigned vsize = GET_MODE_SIZE (mode); + unsigned reg_num = ((WORDS_BIG_ENDIAN && elt >= vsize) + || (!WORDS_BIG_ENDIAN && elt < vsize)); + + rtx vreg = simplify_gen_subreg (vmode, op1, mode, reg_num * 16); + emit_insn (gen_vsx_extract_ (op0, vreg, + GEN_INT (elt % vsize))); DONE; })