[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:93ae45b31df7c241305029140d1780c451dcf450

commit 93ae45b31df7c241305029140d1780c451dcf450
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 16 17:37:57 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index fc7cb496a3c..a39166a1696 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,3 +1,14 @@
+==================== Branch work144-vsize, patch #411 ====================
+
+Eliminate vpair_concat_<mode>_{le,be} rtl constructor.
+
+2023-11-16  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/vector-pair.md (vpair_concat_<mode>_{be,le}): Eliminate
+	rtl constructor.
+
 ==================== Branch work144-vsize, patch #410 ====================
 
 Use vec_concat for building up vector pair vectors.

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:c0b339e0f30d677e308f366126ca16005bb43a6f

commit c0b339e0f30d677e308f366126ca16005bb43a6f
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Nov 17 11:23:00 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index d5fa453e715..27959dd91b8 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,3 +1,14 @@
+==================== Branch work144-vsize, patch #414 ====================
+
+Prefer vector pair for floating point vectorization.
+
+2023-11-16  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.cc (rs6000_preferred_simd_mode): Prefer vector
+	pair floating point for vectorization.
+
 ==================== Branch work144-vsize, patch #413 ====================
 
 Add some integer vector pair support.

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:04ed6709e0af6f652e6d574d8caca8f601c2eb6e

commit 04ed6709e0af6f652e6d574d8caca8f601c2eb6e
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 16 22:46:03 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 22 +++++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index c3cbc7b17a0..d5fa453e715 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,4 +1,24 @@
-==================== Branch work144-vsize, patch #411 ====================
+==================== Branch work144-vsize, patch #413 ====================
+
+Add some integer vector pair support.
+
+
+2023-11-16  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/vector-pair.md (VPAIR_INT): Rename from VPAIR_LOGICAL.
+	(VPAIR_NEG_VNEG): New mode iterator.
+	(VPAIR_NEG_SUB): Likewise.
+	(VPAIR_INT_BINARY): Likewise.
+	(vpair_op): Fix standard name for not.
+	(vec_init<mode><vpair_element_l>): Use vsx_register_operand.
+	(neg<mode>2, VPAIR_NEG_VNEG iterator): New insn.
+	(neg<mode>2, VPAIR_NEG_SUB): Likewise.
+	(vector pair integer ops): Update iterators.  Add add, subtract, min,
+	max, and negate support.
+
+==================== Branch work144-vsize, patch #412 ====================
 
 Add integer logical vector pair instructions

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:079f9dcb905c526214b30fb17b66c981ed030299

commit 079f9dcb905c526214b30fb17b66c981ed030299
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 16 21:55:25 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 41 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index a39166a1696..c3cbc7b17a0 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,5 +1,46 @@
 ==================== Branch work144-vsize, patch #411 ====================
 
+Add integer logical vector pair instructions
+
+2023-11-16  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs600-protos.h (vector_pair_to_vector_mode): Delete.
+	(rs6000_adjust_for_vector_pair): Delete.
+	* config/rs6000/rs6000.cc (rs6000_modes_tieable_p): Allow vector pair
+	modes to be tied with vector modes.
+	(vector_pair_to_vector_mode): Make static.  Move higher.  Add integer
+	vector pair support.
+	(rs6000_split_vpair_constan): Move higher.
+	(rs6000_expand_vector_pair_init): Add integer vector pair support.
+	(altivec_expand_vec_perm_le): Add support for permuting V32QImode.
+	(rs6000_adjust_for_vector_pair): Delete.
+	* config/rs6000/vector-pair.md (VPAIR): Add integer pair modes.
+	(VPAIR_FP): New mode iterator.
+	(VPAIR_FP_UNARY): Rename from VPAIR_UNARY.
+	(VPAIR_FP_BINARY): Rename from VPAIR_BINARY.
+	(VPAIR_LOGICAL): New mode iterator.
+	(VPAIR_LOGICAL_UNARY): New code iterator.
+	(VPAIR_LOGICAL_BINARY): Likewise.
+	(vpair_op): Add integer ops.
+	(VPAIR_VECTOR): Add integer vector pair modes.
+	(vpair_vector_l): Likewise.
+	(VPAIR_ELEMENT): Likewise.
+	(vpair_element_l): Likewise.
+	(floating point operations): Switch from VPAIR to VPAIR_FP.
+	(<vpair_op><mode>2, VPAIR_LOGICAL_UNARY iterator): New insns.
+	(<vpair_op><mode>3, VPAIR_LOGICAL_BINARY iterator): Likewise.
+	(nor<mode>3_1): New combiner insn.
+	(nor<mode>3_): Likewise.
+	(andc<mode>3): Likewise.
+	(eqv<mode>3): Likewise.
+	(nand<mode>3_1): Likewise.
+	(nand<mode>3_2): Likewise.
+	(*orc<mode>3): Likewise.
+
+==================== Branch work144-vsize, patch #411 ====================
+
 Eliminate vpair_concat_<mode>_{le,be} rtl constructor.
 
 2023-11-16  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:d75d815bb2ea779f0963257492552c8f3b426c02

commit d75d815bb2ea779f0963257492552c8f3b426c02
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 16 17:23:32 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index 8ac1afb1369..fc7cb496a3c 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,3 +1,19 @@
+==================== Branch work144-vsize, patch #410 ====================
+
+Use vec_concat for building up vector pair vectors.
+
+2023-11-16  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.cc (rs6000_expand_vector_pair_init): Rename
+	gen_vpair_assemble_<mode> to gen_vpair_concat_<mode>.
+	* config/rs6000/vector-pair.md (UNSPEC_VPAIR_ASSEMBLE): Delete
+	(UNSPEC_VPAIR_SPLAT): Likewise.
+	(vpair_concat_<mode>): Rename from vpair_assemble_<mode>.  Re-implement
+	it, using vec_concat.
+	(vpair_splat_<mode>): Likewise.
+
 ==================== Branch work144-vsize, patch #409 ====================
 
 Convert -mvector-size-32 to variable, not mask.

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:39469bd29402d41f14c7457364d79e494f2b91b2

commit 39469bd29402d41f14c7457364d79e494f2b91b2
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 16 17:02:22 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index fe4656d1aa4..8ac1afb1369 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,3 +1,21 @@
+==================== Branch work144-vsize, patch #409 ====================
+
+Convert -mvector-size-32 to variable, not mask.
+
+2023-11-16  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-c.cc (rs6000_cpu_cpp_builtins): Check for -mmma
+	as well as -mvector-size-32.
+	* config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Convert
+	-mvector-size-32 to variable.
+	(POWERPOC_MASKS): Likewise.
+	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Likewise.
+	(rs6000_opt_masks): Likewise.
+	(rs6000_opt_vars): Likewise.
+	* config/rs6000/rs6000.opt (-mvector-size-32): Likewise.
+
 ==================== Branch work144-vsize, patch #408 ====================
 
 Rework vector pair extract.

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:aaceaec031461914957ecd65423a58bfa3202a92

commit aaceaec031461914957ecd65423a58bfa3202a92
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 16 15:16:51 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index 2d7ac4f6a3c..fe4656d1aa4 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,4 +1,17 @@
-==================== Branch work144-vsize, patch #406 ====================
+==================== Branch work144-vsize, patch #408 ====================
+
+Rework vector pair extract.
+
+2023-11-16  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-protos.h (rs6000_expand_vector_pair_extract):
+	Delete.
+	* config/rs6000/rs6000.cc (rs6000_expand_vector_pair_extract): Delete.
+	* config/rs6000/vector-pair.md (vec_extract<mode><vpair_element_l>): Rework.
+
+==================== Branch work144-vsize, patch #407 ====================
 
 Rework vector pair init, stub vector pair set and extract.

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:cd1fc3cec0a00d866d807bd13ec3bc15d29346aa

commit cd1fc3cec0a00d866d807bd13ec3bc15d29346aa
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 16 12:47:52 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index 3642ed1f9ac..2d7ac4f6a3c 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,5 +1,31 @@
 ==================== Branch work144-vsize, patch #406 ====================
 
+Rework vector pair init, stub vector pair set and extract.
+
+2023-11-16  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000-protos.h (rs6000_expand_vector_pair_init): New
+	declaration.
+	(rs6000_expand_vector_pair_set): Likewise.
+	(rs6000_expand_vector_pair_extract): Likewise.
+	* config/rs6000/rs6000.cc (rs6000_expand_vector_init): Remove vector
+	pair code.
+	(rs6000_expand_vector_pair_init): New function.
+	(rs6000_expand_vector_pair_set): New stub function.
+	(rs6000_expand_vector_extract): Remove vector pair support.
+	(rs6000_expand_vector_pair_extract): New stub function.
+	* config/rs6000/vector-pair.md (vpair_element_l): Return correct types.
+	(vec_init<mode><vpair_element_l>): New insn.
+	(vec_set<mode>): Likewise.
+	(vec_extract<mode><vpair_element_l): Likewise.
+	* config/rs6000/vector.md (VEC_E): Remvoe vector pair support.
+	(VEC_base): Likewise.
+	(VEC_base_l): Likewise.
+
+==================== Branch work144-vsize, patch #406 ====================
+
 Fix typo.
 
 2023-11-16  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:dc6dc3af91984e68fa4425a305a5be74f2180593

commit dc6dc3af91984e68fa4425a305a5be74f2180593
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 16 02:17:50 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index 0295ec922e7..3642ed1f9ac 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,3 +1,13 @@
+==================== Branch work144-vsize, patch #406 ====================
+
+Fix typo.
+
+2023-11-16  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/vector-pair.md (mov<mode>): Fix typo.
+
 ==================== Branch work144-vsize, patch #405 ====================
 
 Add vpair assemble, splat support.

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:55e3891c42525abce91997bc5ddaf8a4e60cf6af

commit 55e3891c42525abce91997bc5ddaf8a4e60cf6af
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 15 22:15:34 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index 012fd9fbcee..0295ec922e7 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,3 +1,31 @@
+==================== Branch work144-vsize, patch #405 ====================
+
+Add vpair assemble, splat support.
+
+2023-11-15  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/predicates.md (mma_assemble_input_operand): Allow all
+	16-byte vector types.  Also allow constants that are easy to generate.
+	* config/rs6000/rs6000.cc (rs6000_expand_vector_init): Add support for
+	splatting vector pair types.
+	* config/rs6000/vector-pair.md (UNSPEC_VPAIR_ASSEMBLE): New unspec.
+	(UNSPEC_VPAIR_SPLAT): Likewise.
+	(vpair_vector_l): Rename from vpair_vector.
+	(VPAIR_ELEMENT): New mode attribute.
+	(vpair_element_l): Likewise.
+	(mov<mode>): Add alternative for zeroing the vector pair.
+	(vpair_assemble_<mode>): New insn.
+	(vpair_splat_<mode>): Likewise.
+	(<vpair_op><mode>2): Rename vpair_vector to vpair_vector_l.
+	(nabs<mode>2): Likewise.
+	(vpair_op><mode3): Likewise.
+	(fma<mode>4): Likewise.
+	(fms<mode>4): Likewise.
+	(nfma<mode>4): Likewise.
+	(nfms<mode>4): Likewise.
+
 ==================== Branch work144-vsize, patch #404 ====================
 
 Delete vector pair integer support.

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:a7f2370753e6c776e9e218b015c49e489b98ea76

commit a7f2370753e6c776e9e218b015c49e489b98ea76
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 15 19:43:13 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 49 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index 0950f577225..012fd9fbcee 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,3 +1,52 @@
+==================== Branch work144-vsize, patch #404 ====================
+
+Delete vector pair integer support.
+
+2023-11-15  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/rs6000.cc (rs6000_init_hard_regno_mode_ok): Delete
+	vector pair integer support.
+	(rs6000_expand_vector_extract): Likewise.
+	(reg_offset_addressing_ok_p): Likewise.
+	(rs6000_emit_move): Likewise.
+	(vector_pair_to_vector_mode): Likewise.
+	* config/rs6000/rs6000.md (RELOAD): Likewise.
+	* config/rs6000/vector-pair.md (VPAIR): Likewise.
+	(VPAIR_INT): Delete.
+	(VPAIR_NEG_VNEG): Likewise.
+	(VPAIR_NEG_SUB): Likewise.
+	(VPAIR_FP): Likewise.
+	(VPAIR_UNARY): Rename from VPAIR_FP_UNARY.
+	(VPAIR_BINARY): Rename from VPAIR_FP_BINARY
+	(vpair_op): Delete vector pair integer support.
+	(VPAIR_VECTOR): Move from vsx.md.  Delete vector pair integer support.
+	(vpair_vectore): Likewise.
+	(<vpair_op><mode>2, VPAIR_UNARY iterator): Change VPAIR_FP -> VPAIR.
+	(nabs<mode>2): Likewise.
+	(<vpair_op><mode>3, VPAIR_BINARY unary): Likewise.
+	(fma<mode>4): Change <name>3 -> name<4>.  Change VPAIR_FP -> VPAIR.
+	(fms<mode>4): Likewise.
+	(nfma<mode>4): Likewise.
+	(nfms<mode>4): Likewise.
+	(fma_fpcontract_<mode>4): Likewise.
+	(fms_fpcontract_<mode>4): Likewise.
+	(nfma_fpcontract_<mode>4): Likewise.
+	(nfms_fpcontract_<mode>4): Likewise.
+	(all integer vpair insns): Delete.
+	* config/rs6000/vector.md (VEC_E): Delete integer vector pair support.
+	(VEC_base): Likewise.
+	(VEC_base_l): Likewise.
+	* config/rs6000/vsx.md (VSX_EXTRACT_PREDICATE): Likewise.
+	(VSX_EX): Likewise.
+	(VPAIR_V4DI_V4DF): Delete.
+	(VPAIR_SMALL_INT): Likewise.
+	(VPAIR_VECTOR): Move to vector-pair.md.
+	(vpair_vector): Likewise.
+	(vsx_extract_v4df): Rename from vsx_extract_<mode>, delete V4DI support.
+	(vsx_extract_<mode>, VPAIR_SMALL_INT iterator): Delete.
+
 ==================== Branch work144-vsize, patch #403 ====================
 
 Add -mvector-size-32 requirement to vector pair move insns

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:4cc4fbec994dcfb54a85f99a528a867ac9c35d0e

commit 4cc4fbec994dcfb54a85f99a528a867ac9c35d0e
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 15 14:58:35 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index 11c1ad52ade..0950f577225 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,3 +1,13 @@
+==================== Branch work144-vsize, patch #403 ====================
+
+Add -mvector-size-32 requirement to vector pair move insns
+
+2023-11-15  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/vector-pair.md (mov<mode>): Add -mvector-size-32 check.
+
 ==================== Branch work144-vsize, patch #402 ====================
 
 Require -mvector-size-32 for vector pair init, extract, and set.

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:0d01358594486b0c9e98e12b5854aaeff35ceb86

commit 0d01358594486b0c9e98e12b5854aaeff35ceb86
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 15 14:35:21 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index eff3cb95398..11c1ad52ade 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,3 +1,14 @@
+==================== Branch work144-vsize, patch #402 ====================
+
+Require -mvector-size-32 for vector pair init, extract, and set.
+
+2023-11-15  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/vector.md (VEC_E): Check for -mvector-size-32 for vector
+	pair modes.
+
 ==================== Branch work144-vsize, patch #401 ====================
 
 Add init, extract, and set support for vector pair modes.

[gcc(refs/users/meissner/heads/work144-vsize)] Update ChangeLog.*

[Michael Meissner]

https://gcc.gnu.org/g:107a6e004e5fac7caa42aea659f1f8f8046e5ea2

commit 107a6e004e5fac7caa42aea659f1f8f8046e5ea2
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Nov 15 13:34:57 2023 -0500

    Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vsize | 163 +++++++++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 162 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.vsize b/gcc/ChangeLog.vsize
index a1aeb7b3527..eff3cb95398 100644
--- a/gcc/ChangeLog.vsize
+++ b/gcc/ChangeLog.vsize
@@ -1,3 +1,164 @@
+==================== Branch work144-vsize, patch #401 ====================
+
+Add init, extract, and set support for vector pair modes.
+
+2023-11-15  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/vector.md (VEC_E): Add vector pair modes.
+	(VEC_base_l): Likewise.
+
+==================== Branch work144-vsize, patch #400 ====================
+
+Add support for -mvector-size-32.
+
+2023-11-09  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/predicates.md (const_0_to_31_operand): New predicate.
+	* config/rs6000/rs6000-c.cc (rs6000_cpu_cpp_builtins): Define
+	__VECTOR_SIZE_32__ if -mvector-size-32 was used.
+	* config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Add
+	-mvector-size-32.
+	(POWERPC_MASKS): Likewise.
+	* config/rs6000/rs6000-protos.h (vector_pair_to_vector_mode): New
+	declaration.
+	(rs6000_adjust_for_vector_pair): Likewise.
+	(split_unary_vector_pair): Likewise.
+	(split_binary_vector_pair): Likewise.
+	(split_fma_vector_pair): Likewise.
+	* config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Add
+	support for 32-byte vector types created with -mvector-size-32.
+	(rs6000_modes_tieable_p): Make all 32-byte vectors tie with other
+	32-byte vectors.
+	(rs6000_debug_reg_global): If -mdebug=reg, print whether
+	-mvector-size-32 was enabled.
+	(rs6000_init_hard_regno_mode_ok): Add support for 32-byte vectors.
+	(rs6000_option_override_internal): Add checking for -mvector-size-32.
+	(rs6000_opt_masks): Add -mvector-size-32.
+	(rs6000_expand_vector_extract): Add support for 32-byte vectors.
+	(reg_offset_addressing_ok_p): Likewise.
+	(rs6000_emit_move): Likewise.
+	(rs6000_preferred_reload_class): Likewise.
+	(vector_pair_to_vector_mode): New vector pair helper function.
+	(rs6000_adjust_for_vector_pair): Likewise.
+	(rs6000_split_vpair_constan): Likewise.
+	(split_unary_vector_pair): Likewise.
+	(split_binary_vector_pair): Likewise.
+	(split_fma_vector_pair): Likewise.
+	(rs6000_split_multireg_move): Add support for 32-byte vectors.
+	* config/rs6000/rs6000.h (VECTOR_PAIR_MODE): New macro.
+	* config/rs6000/rs6000.md (wd attribute): Add 32-byte vector modes.
+	(RELOAD): Likewise.
+	(toplevel): Include vector-pair.md.
+	* config/rs6000/rs6000.opt (-mvector-size-32): New option.
+	* config/rs6000/t-rs6000 (MD_INCLUDES): Add vector-pair.md.
+	* config/rs6000/vector-pair.md: New file.
+	* config/rs6000/vector.md (VEC_base): Add 32-byte vector modes.
+	* config/rs6000/vsx.md (VSX_EXTRACT_PREDICATE): Likewise.
+	(VSX_EX): Likewise.
+	(VPAIR_V4DI_V4DF): New mode iterator.
+	(VPAIR_VECTOR): New mode attribute.
+	(vpair_vector): Likewise.
+	(vsx_extract_<mode>, VPAIR_V4DF_V4DI iterator): New extract insn for
+	vector pair support.
+	(vsx_extract_v8sf): Likewise.
+	(vsx_extract_<mode>, VPAIR_SMALL_INT iterator): Likewise.
+
+gcc/testsuite/
+
+	* gcc.target/powerpc/vector-size-32-1.c: New test.
+	* gcc.target/powerpc/vector-size-32-2.c: New test.
+	* gcc.target/powerpc/vector-size-32-3.c: New test.
+	* gcc.target/powerpc/vector-size-32-4.c: New test.
+	* gcc.target/powerpc/vector-size-32-5.c: New test.
+	* gcc.target/powerpc/vector-size-32-6.c: New test.
+
+
 ==================== Branch work144-vsize, patch #1 (from work144) ====================
 
-See ChangeLog.meissner
+Power10: Add options to disable load and store vector pair.
+
+This is version 2 of the patch to add -mno-load-vector-pair and
+-mno-store-vector-pair undocumented tuning switches.
+
+The differences between the first version of the patch and this version is that
+I added explicit RTL abi attributes for when the compiler can generate the load
+vector pair and store vector pair instructions.  By having this attribute, the
+movoo insn has separate alternatives for when we generate the instruction and
+when we want to split the instruction into 2 separate vector loads or stores.
+
+In the first version of the patch, I had previously provided built-in functions
+that would always generate load vector pair and store vector pair instructions
+even if these instructions are normally disabled.  I found these built-ins
+weren't specified like the other vector pair built-ins, and I didn't include
+documentation for the built-in functions.  If we want such built-in functions,
+we can add them as a separate patch later.
+
+In addition, since both versions of the patch adds #pragma target and attribute
+support to change the results for individual functions, we can select on a
+function by function basis what the defaults for load/store vector pair is.
+
+The original text for the patch is:
+
+In working on some future patches that involve utilizing vector pair
+instructions, I wanted to be able to tune my program to enable or disable using
+the vector pair load or store operations while still keeping the other
+operations on the vector pair.
+
+This patch adds two undocumented tuning options.  The -mno-load-vector-pair
+option would tell GCC to generate two load vector instructions instead of a
+single load vector pair.  The -mno-store-vector-pair option would tell GCC to
+generate two store vector instructions instead of a single store vector pair.
+
+If either -mno-load-vector-pair is used, GCC will not generate the indexed
+stxvpx instruction.  Similarly if -mno-store-vector-pair is used, GCC will not
+generate the indexed lxvpx instruction.  The reason for this is to enable
+splitting the {,p}lxvp or {,p}stxvp instructions after reload without needing a
+scratch GPR register.
+
+The default for -mcpu=power10 is that both load vector pair and store vector
+pair are enabled.
+
+I added code so that the user code can modify these settings using either a
+'#pragma GCC target' directive or used __attribute__((__target__(...))) in the
+function declaration.
+
+I added tests for the switches, #pragma, and attribute options.
+
+I have built this on both little endian power10 systems and big endian power9
+systems doing the normal bootstrap and test.  There were no regressions in any
+of the tests, and the new tests passed.  Can I check this patch into the master
+branch?
+
+2023-11-09  Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/mma.md (movoo): Add support for -mno-load-vector-pair and
+	-mno-store-vector-pair.
+	* config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Add support for
+	-mload-vector-pair and -mstore-vector-pair.
+	(POWERPC_MASKS): Likewise.
+	* config/rs6000/rs6000.cc (rs6000_setup_reg_addr_masks): Only allow
+	indexed mode for OOmode if we are generating both load vector pair and
+	store vector pair instructions.
+	(rs6000_option_override_internal): Add support for -mno-load-vector-pair
+	and -mno-store-vector-pair.
+	(rs6000_opt_masks): Likewise.
+	* config/rs6000/rs6000.md (isa attribute): Add lxvp and stxvp
+	attributes.
+	(enabled attribute): Likewise.
+	* config/rs6000/rs6000.opt (-mload-vector-pair): New option.
+	(-mstore-vector-pair): Likewise.
+
+gcc/testsuite/
+
+	* gcc.target/powerpc/vector-pair-attribute.c: New test.
+	* gcc.target/powerpc/vector-pair-pragma.c: New test.
+	* gcc.target/powerpc/vector-pair-switch1.c: New test.
+	* gcc.target/powerpc/vector-pair-switch2.c: New test.
+	* gcc.target/powerpc/vector-pair-switch3.c: New test.
+	* gcc.target/powerpc/vector-pair-switch4.c: New test.