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* [gcc/meissner/heads/work145-test] (13 commits) Merge commit 'refs/users/meissner/heads/work145-test' of gi
@ 2023-11-17 18:43 Michael Meissner
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From: Michael Meissner @ 2023-11-17 18:43 UTC (permalink / raw)
To: gcc-cvs
The branch 'meissner/heads/work145-test' was updated to point to:
606f6350c2d... Merge commit 'refs/users/meissner/heads/work145-test' of gi
It previously pointed to:
74b40eb70d4... Add ChangeLog.test and update REVISION.
Diff:
Summary of changes (added commits):
-----------------------------------
606f635... Merge commit 'refs/users/meissner/heads/work145-test' of gi
bbe5fc2... Add ChangeLog.test and update REVISION.
eab7ef2... Revert patches (*)
0890048... Add saturating subtract built-ins. (*)
f3cb0a6... Support load/store vector with right length. (*)
9dcccc1... PowerPC: Add support for 1,024 bit DMR registers. (*)
49c7e70... PowerPC: Switch to dense math names for all MMA operations. (*)
c86b352... PowerPC: Make MMA insns support DMR registers. (*)
5ebec7d... PowerPC: Add support for accumulators in DMR registers. (*)
f6ef223... PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair. (*)
e2e9de7... PowerPC: Add -mcpu=future. (*)
b6b440d... Update ChangeLog.* (*)
86c1329... Power10: Add options to disable load and store vector pair. (*)
(*) This commit already exists in another branch.
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2023-11-17 18:43 [gcc/meissner/heads/work145-test] (13 commits) Merge commit 'refs/users/meissner/heads/work145-test' of gi Michael Meissner
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