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* [gcc/microsoft/heads/main] (1138 commits) Merge commit 'e85c596ae2d1e5f5b769b5af4c0a8e7d055e40d7' int
@ 2023-11-20 21:52 Eugene Rozenfeld
  0 siblings, 0 replies; only message in thread
From: Eugene Rozenfeld @ 2023-11-20 21:52 UTC (permalink / raw)
  To: gcc-cvs

The branch 'microsoft/heads/main' was updated to point to:

 dc4291d90c6... Merge commit 'e85c596ae2d1e5f5b769b5af4c0a8e7d055e40d7' int

It previously pointed to:

 d14c6ed627a... Merge commit '3da32cc3d1e48f2eac1630e627d34723b9536166' int

Diff:

Summary of changes (added commits):
-----------------------------------

  dc4291d... Merge commit 'e85c596ae2d1e5f5b769b5af4c0a8e7d055e40d7' int
  9f0021e... Update xfail with new failures
  e85c596... c++: compare one level of template parms (*)
  c51eafc... c++: add DECL_IMPLICIT_TEMPLATE_PARM_P macro (*)
  0d734c7... Add i?86-*-* and x86_64-*-* to vect_logical_reduc (*)
  2b59e2b... Support reduc_{plus,xor,and,ior}_scal_m for vector integer  (*)
  e6269bb... RISC-V: Implement -mmemcpy-strategy= options[PR112537] (*)
  8bccee5... LoongArch: Modify MUSL_DYNAMIC_LINKER. (*)
  b54b380... Daily bump. (*)
  bb6028b... RISC-V: Optimize constant AVL for LRA pattern (*)
  eaeaad3... c++: Set DECL_CONTEXT for __cxa_thread_atexit [PR99187] (*)
  c177f28... [committed] RISC-V: Infrastructure for instruction fusion (*)
  07da9b7... [committed] Fix missing mode on a few unspec/unspec_volatil (*)
  06e7cc7... testsuite: Don't use -mfloat128 with AIX. (*)
  56ca59a... Makefile.tpl: Avoid race condition in generating site.exp f (*)
  78d132d... libcpp: split decls out to rich-location.h (*)
  af7fa31... RISC-V: Fix bug of tuple move splitter (*)
  f65f63c... analyzer: new warning: -Wanalyzer-undefined-behavior-strtok (*)
  9d58d2d... Daily bump. (*)
  f73808b... MAINTAINERS: Update my email address. (*)
  279e407... libstdc++: Check string value_type in std::make_format_args (*)
  41a5ea4... libstdc++: Add fast path for std::format("{}", x) [PR110801 (*)
  84c5ded... LoongArch: Fix "-mexplict-relocs=none -mcmodel=medium" prod (*)
  51bda9f... LoongArch: Add fine-grained control for LAM_BH and LAMCAS (*)
  181ed72... LoongArch: Don't emit dbar 0x700 if -mld-seq-sa (*)
  5d3d605... LoongArch: Take the advantage of -mdiv32 if it's enabled (*)
  ccead01... LoongArch: Add evolution features of base ISA revisions (*)
  8835242... LoongArch: genopts: Add infrastructure to generate code for (*)
  56752a6... LoongArch: Fix internal error running "gcc -march=native" o (*)
  20a3c74... gcov: Improve -fprofile-update=atomic (*)
  a350a74... gcov: Add gen_counter_update() (*)
  3ef8882... Add TARGET_HAVE_LIBATOMIC (*)
  23d3377... gcov: Remove TARGET_GCOV_TYPE_SIZE target hook (*)
  5f44996... RISC-V: Fix mismatched new delete for unique_ptr (*)
  9419b40... MAINTAINERS: Update my e-mail address (*)
  07fe079... RISC-V: Refactor RVV iterators[NFC] (*)
  f76d47e... Testsuite: remove unused variables (*)
  c2553dd... libsanitizer: fix build on darwin (*)
  26ab97e... LoongArch: atomic_load and atomic_store are implemented usi (*)
  1b12e7a... LoongArch: Implement atomic operations using LoongArch1.1 i (*)
  c68463a... LoongArch: Add LA664 support. (*)
  094cca4... LoongArch: Add code generation support for call36 function  (*)
  841008d... analyzer: new warning: -Wanalyzer-infinite-loop [PR106147] (*)
  c63a0bb... Daily bump. (*)
  231bb99... vect: Pass truth type to vect_get_vec_defs. (*)
  bc274b8... libstdc++: Regenerate config.h.in (*)
  568eb2d... libstdc++: Define C++26 saturation arithmetic functions (P0 (*)
  52eedfa... c++: Implement C++ DR 2406 - [[fallthrough]] attribute and  (*)
  97fc885... libstdc++: Adjust std::in_range template parameter name (*)
  66c1528... libstdc++: Add more Doxygen comments and another test for s (*)
  9c950c0... libstdc++: Fix Doxygen markup (*)
  6dd4c70... match.pd: Optimize ctz/popcount/parity/ffs on extended argu (*)
  172a72d... vect: Fix check_reduction_path [PR112374] (*)
  04abafe... tree-optimization/112585 - new testcase (*)
  1f28b2e... Revert "tree-optimization/112281 - loop distribution and ze (*)
  b9eba3b... Fortran: Accept -std=f2023, update line-length for Fortran  (*)
  68221c5... PR target/53372: Don't ignore section attribute with addres (*)
  ba3f5b8... Testsuite: silence some noise in output (*)
  bdf20fd... LoongArch: Handle vectorized copysign (x, -1) expansion eff (*)
  10615c8... rs6000: Fix regression cases caused 16-byte by pieces move (*)
  cd295a8... rs6000: Enable vector mode for by pieces equality compare (*)
  5c8cb42... LoongArch: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO (*)
  1bcb7fe... Assert we don't create recursive DW_AT_{abstract_origin,spe (*)
  3718301... LoongArch: Increase cost of vector aligned store/load. (*)
  fa5af4f... LoongArch: Fix scan-assembler-times of lasx/lsx test case. (*)
  5cb1317... Daily bump. (*)
  9e9279f... Only allow (copysign x, NEG_CONST) -> (fneg (fabs x)) simpl (*)
  1c1ee80... Fix warning on new Ada testcase (*)
  a671095... RISC-V: Change unaligned fast/slow/avoid macros to misalign (*)
  8ebc7e0... i386: Optimize QImode insn with high input registers (*)
  d2934eb... hppa: Revise REG+D address support to allow long displaceme (*)
  4d8b41b... Fix internal error on function returning dynamically-sized  (*)
  23725aa... libstdc++: Fix aligned formatting of stacktrace_entry and t (*)
  8ed7120... Add myself to write after approval (*)
  0fa32ae... c++: Fix error recovery ICE [PR112365] (*)
  06ff410... i386: Fix invalid RTX in split2 pass [PR112567] (*)
  063d987... c++: add fixed testcases [PR98614, PR104802] (*)
  0077c0f... c++: constantness of call to function pointer [PR111703] (*)
  4547c27... diagnostics: make m_lang_mask private (*)
  7a496b7... middle-end: skip checking loop exits if loop malformed [PR1 (*)
  ec35fdc... gcc.c-torture/execute/931004-13.c: Fix declaration of main (*)
  5f11056... RISC-V: Implement target attribute (*)
  defa868... RISC-V: Save/restore ra register correctly [PR112478] (*)
  e36d5f4... Fix ICE of unrecognizable insn. (*)
  c7f6537... libstdc++: Implement std::out_ptr and std::inout_ptr for C+ (*)
  7ffa63d... libstdc++: Only declare feature test macros in standard hea (*)
  f4ab684... libstdc++: Test for feature test macros more accurately (*)
  e469f90... libstdc++: Use 202100L as feature test check for C++23 (*)
  17aca35... libstdc++: Adjust feature test in <istream> and <ostream> (*)
  f158bd5... i386: Fix mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm (*)
  9f35d8c... slp: Fix handling of IFN_CLZ/CTZ [PR112536] (*)
  31bf21c... tree-optimization/112282 - fix testcase (*)
  fc6f7ab... VECT: Clear LOOP_VINFO_USING_SELECT_VL_P when loop is not p (*)
  6d16e46... Fix crash in libcc1 (*)
  70060da... c++: fix parsing with auto(x) [PR112410] (*)
  9251db0... [i386] APX: Fix EGPR usage in several patterns. (*)
  17cc2e5... Daily bump. (*)
  e8676f9... i386: Optimize strict_low_part QImode insn with high input  (*)
  01bc30b... Regenerate libiberty/aclocal.m4 with aclocal 1.15.1 (*)
  026d945... RISC-V: Fix ICE in non-canonical march parsing (*)
  1863310... c++, analyzer: Expand CAN_HAVE_LOCATION_P macro. (*)
  d1189ce... RISC-V: fix vsetvli pass testsuite failure [PR/112447] (*)
  fb4e2c1... RISC-V: elide unnecessary sign extend when expanding cmp_an (*)
  b126f3f... c++: direct enum init from type-dep elt [PR112515] (*)
  40a7707... c++: partially inst requires-expr in noexcept-spec [PR10104 (*)
  d3f48f6... c++: non-dependent .* operand folding [PR112427] (*)
  6665a85... c++: constantness of local var in constexpr fn [PR111703, P (*)
  93d85b8... i386: Fix split condition of *<insn>qi_ext<mode>_1_slp patt (*)
  deff85c... i386: Fix strict_low_part QImode insn with high input regis (*)
  4450984... nvptx: Fix copy'n'paste-o in '__builtin_nvptx_brev' descrip (*)
  75c20a9... Update nvptx's bitrev<mode>2 pattern to use BITREVERSE rtx. (*)
  61c45c0... nvptx: Extend 'brev' test cases (*)
  ae0d2c2... amdgcn: Add Accelerator VGPR registers (*)
  a0e6306... amdgcn: simplify secondary reload patterns (*)
  8747ef4... s390: Fix generation of s390-gen-builtins.h (*)
  5cb8610... tree-optimization/112282 - wrong-code with ifcvt hoisting (*)
  bcef48b... Fix ICE with SLP and -fdbg-cnt (*)
  b648bc5... libsanitizer: update LOCAL_PATCHES (*)
  95710d7... libsanitizer: Readd __ubsan_handle_function_type_mismatch_v (*)
  fab2571... libsanitizer: Adjust the asan/sanity-check-pure-c-1.c test (*)
  aaf0f12... libsanitizer: Apply local patches (*)
  28219f7... libsanitizer: merge from upstream (c425db2eb558c263) (*)
  4d86dc5... LoongArch: Remove redundant barrier instructions before LL- (*)
  452476d... libstdc++: Fix std::deque::operator[] Xmethod [PR112491] (*)
  cbd0fe2... libstdc++: std::stacktrace tweaks (*)
  7c16f7a... arm: testsuite: fix test for armv6t2 hardware (*)
  e9fc877... RISC-V: Support trailing vec_init optimization (*)
  da36a43... testsuite: Adjust gcc.dg/cpp/if-2.c for 16-bit targets (*)
  319bbb3... RISC-V: Refine the mask generation for vec_init case 2 (*)
  d85161a... RISC-V: Disallow RVV mode address for any load/store[PR1125 (*)
  5f580e2... c++: Implement C++26 P2864R2 - Remove Deprecated Arithmetic (*)
  081fddb... Revert "libstdc++: bvector: undef always_inline macro" (*)
  f5d9499... testsuite: tsan: add fallback overload for pthread_cond_clo (*)
  a9a0daa... testsuite: arg-pushing reqs -mno-accumulate-outgoing-args (*)
  a1ad62e... libstdc++: bvector: undef always_inline macro (*)
  2220263... json.cc: use SELFTEST_LOCATION in selftests (*)
  eaedb56... Daily bump. (*)
  9938645... c-family: Let libcpp know when the compilation is for a PCH (*)
  f71352c... libstdc++: Improve operator-(weekday x, weekday y) (*)
  f6ce081... libstdc++: Fix UB in weekday::weekday(sys_days) and add tes (*)
  86a0df1... libstdc++: Simplify year::is_leap() (*)
  b011535... libstdc++: Remove unnecessary "& 1" from year_month_day_las (*)
  1c15303... libstdc++: Fix <charconv> uses of signed types with <bit> f (*)
  6f2fc42... libstdc++: Fix std::hash<std::stacktrace> [PR112348] (*)
  cfaaa8b... analyzer: enable taint state machine by default [PR103533] (*)
  c656052... Manually add ChangeLog entry for r14-5312-g040e5b0edbca8611 (*)
  3d8d443... testsuite: Ignore warning for unsupported option (*)
  14979dd... c++: Stream virtual dtor vtable indices (*)
  5b9ecce... c++: Fix exported using decls of templates (*)
  353f146... diagnostics: make option-handling callbacks private (*)
  07e568d... diagnostics: make m_text_callbacks private (*)
  d0bfd6b... diagnostics: convert diagnostic_ready_p to an inline functi (*)
  b42a09b... i386: Generate strict_low_part QImode insn with high input  (*)
  d64b7c8... libcpp, contrib: Update to Unicode 15.1 (*)
  194825f... c++: Implement C++26 P1854R4 - Making non-encodable string  (*)
  948b8b6... Fix ICE generating uniform vector masks (*)
  1bdd665... input.h: eliminate implicit users of global_dc's file_cache (*)
  070944f... json: reduce use of naked new in json-building code (*)
  4db8209... libstdc++: Fix std::deque::size() Xmethod [PR112491] (*)
  8f331be... Use case label type to create case range. (*)
  2c2fcd6... s390: Fix vec_scatter_element for vectors of floats (*)
  ddb479e... Add a REG_P check for inc and dec for Arm MVE (*)
  2066c29... tree-optimization/111233 - loop splitting miscompile (*)
  bc390ae... Loop distribution fix for SCC detection (*)
  5ea2965... tree-optimization/112281 - loop distribution and zero depen (*)
  b9fd839... Daily bump. (*)
  aad6528... i386: Fix up <insn><dwi>3_doubleword_lowpart [PR112523] (*)
  0a1dd8b... contrib: Ignore the r14-5312-g040e5b0edbca861196d9e2ea2af5e (*)
  3232e73... LibF7: sinh: Fix loss of precision due to cancellation for  (*)
  e47e836... x86: Make testcase apx-spill_to_egprs-1.c more robust (*)
  426e926... IBM Z: Add GTY marker to builtin data structures (*)
  a745d20... IBM Z: Fix ICE with overloading and checking enabled (*)
  69d6986... c++: Link extended FP conversion pedwarns to -Wnarrowing [P (*)
  7383cb5... Add type-generic clz/ctz/clrsb/ffs/parity/popcount builtins (*)
  fe23a2f... LoongArch: Disable relaxation if the assembler don't suppor (*)
  f28306b... Fix ICE in vectorizable_nonlinear_induction with bitfield. (*)
  4a70bfb... LoongArch: Use finer-grained DBAR hints (*)
  6e5f318... tree: Handle BITINT_TYPE in type_contains_placeholder_1 [PR (*)
  6043bfb... i386: Don't optimize vshuf{i,f}{32x4,64x2} and vperm{i,f}12 (*)
  bfcb6e5... RISC-V: Fix init-2.c assembly check (*)
  fd1596f... Handle bitop with INTEGER_CST in analyze_and_compute_bitop_ (*)
  d22b878... maintainer-scripts/gcc_release: cleanup whitespace (*)
  3239a80... maintainer-scripts/gcc_release: use HTTPS for links (*)
  5ee4349... libcpp: Regenerate config.in (*)
  db50aea... *: add modern gettext (*)
  fbe4e64... intl: remove, in favor of out-of-tree gettext (*)
  c28b032... libstdc++: Add dg-timeout-factor to remaining <chrono> IO t (*)
  2c492f9... libstdc++: Micro-optimization for std::optional [PR112480] (*)
  10f12d3... i386: Rewrite pushfl<mode>2 and popfl<mode>1 as unspecs (*)
  c75bab7... i386: Return CCmode from ix86_cc_mode for unknown RTX code  (*)
  97e9cde... [PATCH] testsuite: Fix bad-mapper-1.C test failures with po (*)
  2020bce... RISC-V: vsetvl: Refine REG_EQUAL equality. (*)
  0036702... PR modula2/110779: Add reduced acinclude.m4 to allow interr (*)
  a6ac36d... arm: testsuite: improve compatibility of gcc.dg/debug/pr573 (*)
  1fb7440... arm: testsuite: fix some more architecture tests (*)
  fa3fa73... testsuite: arm: tighten up mode-specific ISA tests (*)
  47b3f2c... arm: testsuite: improve compatibility of gcc.target/arm/pr5 (*)
  cf86e67... arm: testsuite: improve compatibility of gcc.target/arm/pr1 (*)
  511e593... arm: testsuite: improve compatibility of gcc.target/arm/opt (*)
  5bc4249... arm: testsuite: improve compatibility of gcc.target/arm/mac (*)
  b9bed25... arm: testsuite: improve compatibility of ftest-armv7m-thumb (*)
  929dc1f... arm: testsuite: modernize framework usage for arm/scd42-2.c (*)
  ea36e39... arm: testsuite: improve compatibility of pragma_arch_switch (*)
  40e25ea... arm: testsuite: improve compatibility of pragma_arch_attrib (*)
  c034b8f... arm: testsuite: improve compatibility of pr88648-asm-syntax (*)
  a92d0a4... arm: testsuite: improve compatibility of arm/pr78353-*.c (*)
  cec6144... arm: testsuite: tidy up pr65647-2.c pre-checks. (*)
  418ec7e... arm: testsuite: improve compatibility of arm/lto/pr96939_1. (*)
  0fcc0ef... arm: testsuite: tidy up pre-run check for g2.c (*)
  f757ea7... arm: testsuite: avoid problems with -mfpu=auto in attr_thum (*)
  8256527... arm: testsuite: avoid problems with -mfpu=auto in attr-cryp (*)
  380f419... arm: testsuite: avoid problems with -mfpu=auto in pacbti-m- (*)
  ed52bc2... arm: testsuite: avoid hard-float ABI incompatibility with - (*)
  ccbc8bd... arm: testsuite: correctly detect hard_float (*)
  04367b1... arm: testsuite: correctly detect armv6t2 hardware for acle  (*)
  0f593c0... tree-optimization/112495 - alias versioning and address spa (*)
  5021fa7... middle-end/112487 - inline and parameter mismatch (*)
  a0b2abe... tree-optimization/111792 - new testcase (*)
  e0cacaa... RISC-V: Adapt VLS init tests (*)
  ed3ce1c... RISC-V: Optimize combine sequence by merge approach (*)
  2794d51... Support vec_set/vec_extract/vec_init for V4HF/V2HF. (*)
  b51bfee... ARC: Improved DImode rotates and right shifts by one bit. (*)
  e9d59a2... ARC: Provide a TARGET_FOLD_BUILTIN target hook. (*)
  0a14073... i386: Improve reg pressure of double word right shift then  (*)
  56caf0b... i386: Remove j constraint letter from list of unused letter (*)
  fc649fe... C99 testsuite readiness: Cleanup of execute tests (*)
  8fe6a58... C99 testsuite readiness: Add missing abort, exit declaratio (*)
  adb562b... C99 testsuite readiness: Compile more tests with -std=gnu89 (*)
  5c432b0... C99 testsuite readiness: More unverified testcase un-reduct (*)
  a3c2b18... C99 testsuite readiness: Verified un-reductions (*)
  95753bc... C99 testsuite readiness: -fpermissive tests (*)
  7ba7529... Fix (fcopysign x, NEGATIVE_CONST) -> (fneg (fabs x)) simpli (*)
  5a0c302... gimple-range-cache: Fix ICEs when dumping details [PR111967 (*)
  2e0a1f7... LoongArch: Optimize single-used address with -mexplicit-rel (*)
  b88500e... LoongArch: Use simplify_gen_subreg instead of gen_rtx_SUBRE (*)
  401dc18... RISC-V: Fix RVV dynamic frm tests failure (*)
  5dfa501... RISC-V: Support FP l/ll round and rint HF mode autovec (*)
  93e92b2... Revert "[PATCH v2] In the pipeline, USE or CLOBBER should d (*)
  4b75409... i386: Remove *stack_protect_set_4s_<mode>_di alternative th (*)
  3a5a307... LibF7: Use paper-pencil method for sqrt instead of Newton-R (*)
  e0787da... Handle addresses of more constants in IPA-CP (*)
  85b49ad... [PATCH v2] In the pipeline, USE or CLOBBER should delay exe (*)
  7610e5c... tree-ssa-math-opts: Fix up gsi_remove order in match_uaddc_ (*)
  fc8458e... mode-switching: Add a backprop hook (*)
  493b003... mode-switching: Add a target-configurable confluence operat (*)
  718228a... mode-switching: Use 1-based edge aux fields (*)
  93d65f3... mode-switching: Pass the set of live registers to the after (*)
  29d3e18... mode-switching: Pass set of live registers to the needed ho (*)
  4b803fb... mode-switching: Allow targets to set the mode for EH handle (*)
  e59ec35... mode-switching: Tweak entry/exit handling (*)
  335b55f... mode-switching: Simplify recording of transparency (*)
  5afd208... mode-switching: Fix the mode passed to the emit hook (*)
  174ee51... mode-switching: Avoid quadractic list operation (*)
  3cd3a09... mode-switching: Add note problem (*)
  8479a37... mode-switching: Tweak the macro/hook documentation (*)
  c58b426... c: Synthesize nonnull attribute for parameters declared wit (*)
  391f979... Make scan-assembler* ignore LTO sections (*)
  108e934... RISC-V: Add test for PR112469 (*)
  807f474... libstdc++: Do not use assume attribute for Clang [PR112467] (*)
  f7251b7... libstdc++: Simplify std::string_view comparisons (LWG 3950) (*)
  7c02efd... libstdc++: Fix broken tests for <complex.h> (*)
  0953497... libstdc++: Add static_assert to std::integer_sequence [PR11 (*)
  94cc8e9... libstdc++: Fix test that fails with -ffreestanding (*)
  090589e... libstdc++: Deprecate std::atomic_xxx overloads for std::sha (*)
  64bcf3f... libstdc++: Add [[nodiscard]] to lock types (*)
  a92a434... libstdc++: Add [[nodiscard]] to std::span members (*)
  898fd81... libstdc++: Remove handling for underscore-prefixed libm fun (*)
  0b88046... libstdc++: Add missing functions to <cmath> [PR79700] (*)
  08354f5... testsuite: fix lambda-decltype3.C in C++11 (*)
  e0c1476... [PATCH] libgcc/m68k: Fixes for soft float (*)
  b42dd13... [PATCH] doc: Add fpatchable-function-entry to Option-Summar (*)
  c8bff39... RISC-V: Fix indentation of "length" attribute for branches  (*)
  dcafd11... c23: recursive type checking of tagged type (*)
  61701b2... g++: Rely on dg-do-what-default to avoid running pr102788.c (*)
  0f02e74... Handle constant CONSTRUCTORs in operand_compare (*)
  df66fa0... [IRA]: Check autoinc and memory address after temporary equ (*)
  d44dca8... ada: Fix syntax error (*)
  0410b75... c++: decltype of (by-value captured reference) [PR79620] (*)
  705ab79... c++: decltype of capture proxy [PR79378, PR96917] (*)
  5dbaf48... Allow md iterators to include other iterators (*)
  1ae921d... i386: Clear stack protector scratch with zero/sign-extend i (*)
  9917744... i386: Fix ashift insn mnemonic in shift code attribute (*)
  fb90606... Middle-end: Fix bug of induction variable vectorization for (*)
  f880bdc... libatomic: Improve ifunc selection on AArch64 (*)
  6aaf72f... RISC-V: Add combine optimization by slideup for vec_init ve (*)
  62e6ded... RISC-V: testsuite: Fix 32-bit FAILs. (*)
  d7b971c... vect: Look through pattern stmt in fold_left_reduction. (*)
  b70ad8c... RISC-V: XTheadMemPair: Fix missing fcsr handling in ISR pro (*)
  e5f1956... tree-optimization/110221 - SLP and loop mask/len (*)
  a592242... vect: Don't set excess bits in unform masks (*)
  e24b0fe... amdgcn: Fix v_add constraints (pr112308) (*)
  20aa064... middle-end/112469 - fix missing converts in vec_cond_expr s (*)
  8da8b92... amdgcn: Fix vector min/max ICE (*)
  fcddf7c... libgomp.texi: Update OpenMP 6.0-preview implementation-stat (*)
  ebc27b0... LoongArch: Fix instruction name typo in lsx_vreplgr2vr_<lsx (*)
  072a409... RISC-V: Robustify vec_init pattern[NFC] (*)
  040e5b0... Revert "RISC-V: Support vec_init for trailing same element" (*)
  e7f4040... RISC-V: Support vec_init for trailing same element (*)
  879cf9f... [PATCH v3] libiberty: Use posix_spawn in pex-unix when avai (*)
  5a41086... test: Fix FAIL of pr97428.c for RVV (*)
  1fa7dde... RISC-V: Move cond_copysign from combine pattern to autovec  (*)
  907603d... Internal-fn: Add FLOATN support for l/ll round and rint [PR (*)
  57dbc02... [committed] Improve single bit zero extraction on H8. (*)
  9a0cc04... Fix wrong code due to vec_merge + pcmp to blendvb splitter. (*)
  8329ba3... bpf: fix pseudo-c asm emitted for *mulsidi3_zeroextend (*)
  9815ef7... bpf: testsuite: fix expected regexp in gcc.target/bpf/ldxdw (*)
  644390c... libstdc++: mark 20_util/scoped_allocator/noexcept.cc R-E-T  (*)
  d9dbc83... libstdc++: declare std::allocator in !HOSTED as an extensio (*)
  8625aa2... diagnostics: cleanups to diagnostic-show-locus.cc (*)
  0c6c9b6... Add missing declaration of get_restrict in C++ interface (*)
  38202d2... MAINTAINERS: Add myself to write after approval (*)
  d63282f... libstdc++: Fix forwarding in __take/drop_of_repeat_view [PR (*)
  6c2ac6e... RISC-V/testsuite: Fix several zvfh tests. (*)
  016b300... i386:  Improve stack protector patterns and peephole2s even (*)
  a99f6bb... [IRA]: Fixing conflict calculation from region landing pads (*)
  c4cf9aa... libstdc++: [_Hashtable] Use RAII type to manage rehash func (*)
  38b396d... i386 PIE: accept @GOTOFF in load/store multi base address (*)
  9480254... testsuite: xfail scev-[35].c on ia32 (*)
  e01c2ee... AArch64: Add SVE implementation for cond_copysign. (*)
  ed2e058... AArch64: Handle copysign (x, -1) expansion efficiently (*)
  ffd40d3... AArch64: Use SVE unpredicated LOGICAL expressions when Adva (*)
  830460d... AArch64: Add movi for 0 moves for scalar types [PR109154] (*)
  2ea13fb... AArch64: Add special patterns for creating DI scalar and ve (*)
  f30ecd8... ifcvt: Add support for conditional copysign (*)
  3f176e1... middle-end: optimize fneg (fabs (x)) to copysign (x, -1) [P (*)
  2d44ab2... middle-end: expand copysign handling from lockstep to neste (*)
  a80daa2... Fix PR ada/111813 (Inconsistent limit in Ada.Calendar.Forma (*)
  1c6d6b3... Do not prepend target triple to -fuse-ld=lld,mold. (*)
  fd8e5f3... Refactor x86 decl based scatter vectorization, prepare SLP (*)
  177ca16... RISC-V: Refine frm emit after bb end in succ edges (*)
  83f66d9... RISC-V: Add PR112450 test to avoid regression (*)
  8863a79... tree-optimization/112450 - avoid AVX512 style masking for B (*)
  8ebcea9... tree-optimization/112444 - avoid bougs PHI value-numbering (*)
  a0273d2... MAINTAINERS: Update my email address (*)
  78bfc86... MIPS: Use -mnan value for -mabs if not specified (*)
  3a6df32... i386: Fix C99 compatibility issues in the x86-64 AVX ABI te (*)
  6e312b2... c: Add -Wreturn-mismatch warning, split from -Wreturn-type (*)
  f88b78b... gcc.dg/Wmissing-parameter-type*: Test the intended warning (*)
  2f41daa... s390: Revise vector reverse elements (*)
  d7e5ee7... s390: Add expand_perm_reverse_elements (*)
  27381fb... s390: Recognize further vpdi and vmr{l,h} pattern (*)
  fa4dde8... s390: Reduce number of patterns where the condition is fals (*)
  f172b9d... libgcc: Add {unsigned ,}__int128 <-> _Decimal{32,64,128} co (*)
  533241c... attribs: Fix ICE with -Wno-attributes= [PR112339] (*)
  5e9fb75... RISC-V: Fix the illegal operands for the XTheadMemidx exten (*)
  f586515... Fix SIMD clone SLP a bit more (*)
  04d8a47... libstdc++: [_Hashtable] Use RAII type to guard node while c (*)
  5b6f4e6... RISC-V: Fix dynamic LMUL cost model ICE (*)
  e39b3e0... libstdc++: optimize bit iterators assuming normalization [P (*)
  c401bf8... testsuite: adjust gomp test for x86 -m32 (*)
  5057ee0... testsuite: force PIC/PIE off for pr58245-1.C (*)
  61d2b47... skip debug stmts when assigning locus discriminators (*)
  339ced8... RISC-V: Fix dynamic tests [NFC] (*)
  3e9461a... Daily bump. (*)
  dced5ae... i386: Apply LRA reload workaround to insns with high regist (*)
  39d81b6... Fix SLP of emulated gathers (*)
  38168bb... TLC to vect_check_store_rhs and vect_slp_child_index_for_op (*)
  c49e0c5... Fix SLP of masked loads (*)
  8cf7b93... RISC-V: Removed unnecessary sign-extend for vsetvl (*)
  fdd9126... Improve C99 compatibility of gcc.dg/setjmp-7.c test (*)
  f7da591... LibF7: Tweak IEEE double multiplication. (*)
  c2f2351... RISC-V: Fix VSETVL VL check condition bug (*)
  62715bf... libgfortran: Remove empty array descriptor first dimension  (*)
  85a9688... libgfortran: Remove early return if extent is zero [PR11237 (*)
  d56bf41... libgfortran: Don't skip allocation if size is zero [PR11241 (*)
  80f466a... RISC-V: Eliminate unused parameter warning. (*)
  ca281a7... [i386] APX: Fix ICE due to movti postreload splitter [PR112 (*)
  ecb5ddd... test: Fix bb-slp-33.c for RVV (*)
  da4315f... c-family: Enable -fpermissive for C and ObjC (*)
  f914812... RISC-V: Normalize user vsetvl intrinsics[PR112092] (*)
  078087d... i386: Fix isa attribute for TI/TF andnot mode (*)
  f27246b... testsuite: Rename c2x-*, gnu2x-* tests to c23-*, gnu23-* (*)
  c48f105... Daily bump. (*)
  63dc25e... RISC-V: Support FP floor to i/l/ll diff size autovec (*)
  f5ddc36... Fix libgomp build on targets that are not Linux-based or ac (*)
  54bac0c... testsuite: Refer more consistently to C23 not C2X (*)
  2b61b80... test: Recover sdiv_pow2 check and remove test of RISC-V (*)
  fd940d2... vect/ifcvt: Add vec_cond fallback and check for vector vers (*)
  8f2a59c... libstdc++: [_Hashtable] Add missing node destructor call (*)
  d90e5ec... c: Change T2X_* format checking macros to T23_* (*)
  fadf10e... i386: Make flags_reg_operand a special predicate (*)
  8cc3bc9... gcc/configure: Regenerate (*)
  0b94e9c... testsuite: nodiscard-reason-nonstring.C FAIL in C++26 (*)
  a49c7d3... openmp: Add support for the 'indirect' clause in C/C++ (*)
  75e5a46... OpenMP: invoke.texi - mention C attribute syntax for -fopen (*)
  f40eac5... aarch64: Add a %Z operand modifier for SVE registers (*)
  094a609... c: Refer more consistently to C23 not C2X (*)
  beb1e2b... test: Fix FAIL of pr65518.c for RVV[PR112420] (*)
  7562f08... libstdc++/112351 - deal with __gthread_once failure during  (*)
  dd5c3ca... testsuite/vect: Make check more accurate. (*)
  7aacbd4... testsuite: Change expectation for bb-slp-over-widen-n.c (*)
  204186b... RISC-V: Add RISC-V into vect_cmdline_needed (*)
  e87bc7d... testsuite: check for and use -mno-strict-align where needed (*)
  74b3571... RISC-V: Use stdint-gcc.h in xtheadmemidx-helpers.h (*)
  4169033... RISC-V: Add ABI requirement for XTheadFMemIdx tests (*)
  b6ba22c... ada: Fix debug info for aliased packed array with unconstra (*)
  c210397... ada: Fix spurious -Wstringop-overflow with link time optimi (*)
  756e05d... ada: Compiler crash on early alignment clause (*)
  09e5e68... ada: Update the logo in the gnat doc (*)
  003fe13... ada: Fix incorrect resolution of overloaded function call i (*)
  63eaa7e... ada: Fix Ada.Directories.Modification_Time on Windows (*)
  a2e4afc... ada: Elide temporary for aliased array with unconstrained n (*)
  de4f705... ada: Fix expansion of type aspects with handling of aspects (*)
  36fcb4b... ada: Rename Is_Limited_View to reflect actual query (*)
  76bf432... ada: Implement Aspects as fields under nodes (*)
  de4588f... ada: Minor tweaks for comparison operators (*)
  598409d... ada: Cleanup "not Present" on List_Id (*)
  afb52e6... ada: Cleanup more "not Present" (*)
  f9e0e67... ada: Fix documentation of -gnatwc (*)
  9daee42... ada: New Local_Restrictions and User_Aspect aspects. (*)
  7c09fcf... ada: Error in prefix-notation call (*)
  fe11fa6... ada: Remove duplicated code for expansion of packed array a (*)
  dedaaa8... ada: Simplify expansion of packed array assignments (*)
  7385cd3... ada: Fix extra whitespace after END keywords (*)
  aeca5b9... ada: Avoid extra conversion in expansion of packed array as (*)
  9eb5deb... ada: Simplify handling of known values in expansion of pack (*)
  68040a6... ada: Change local variables to constants in expansion of pa (*)
  3335c4c... ada: Fix style in declaration of routine for expansion of p (*)
  98787e9... ada: Cleanup getting of actual subtypes (*)
  b618441... ada: Fix handling of actual subtypes for expanded names (*)
  a4a24e5... ada: Simplify code for Ignore_Style_Checks_Pragmas (*)
  95b8d1b... ada: Fix scope of semantic style_check pragmas (*)
  5a2d82e... ada: Fix internal error on address of element of packed arr (*)
  ab7ccb9... RISC-V regression test: Fix FAIL bb-slp-cond-1.c for RVV (*)
  a5a76c6... rs6000,testcase: Add require-effective-target has_arch_ppc6 (*)
  71b1efd... RISC-V: Fixed failed rvv combine testcases (*)
  86c913e... test: Fix FAIL of vect-sdiv-pow2-1.c for RVV test: Fix FAIL (*)
  7ba2d23... test: Fix FAIL of SAD tests for RVV (*)
  d060f8a... test: Fix XPASS of bb-slp-43.c for RVV (*)
  f1e084c... RISC-V: Enhance AVL propagation for complicate reduction au (*)
  fd56a9c... RISC-V: Support FP ceil to i/l/ll diff size autovec (*)
  b7d05f1... Revert "test: Fix FAIL of bb-slp-cond-1.c for RVV" (*)
  ee7ba24... test: Fix FAIL of bb-slp-cond-1.c for RVV (*)
  942ff58... RISC-V regression test: Fix FAIL of bb-slp-39.c (*)
  2cca6ae... Daily bump. (*)
  2b64e4a... libstdc++: use -D_GNU_SOURCE when building libbacktrace (*)
  471fb6e... MAINTAINERS: Update my email address (*)
  91d7b03... hppa: Fix typo in PA 2.0 trampoline template (*)
  940f498... Enable generation of GNU stack notes on Linux (*)
  54da47f... diagnostics: split out struct diagnostic_source_printing_op (*)
  38763e2... diagnostics: introduce class diagnostic_option_classifier (*)
  a526cc6... diagnostics: make diagnostic_context::m_urlifier private (*)
  579bb65... diagnostics: eliminate diagnostic_kind_count (*)
  7e3c58b... Avoid undeclared use of abort in gcc.dg/cpp/wchar-1.c (*)
  0794263... testsuite: Force use of -c when precompiling headers (*)
  470b001... testsuite: Add and use thread_fence effective-target (*)
  e15dd9a... Fortran: Fix generate_error library function fnspec (*)
  ecd755a... i386: Use "addr" attribute to limit address regclass to non (*)
  fad61bf... c: Add -std=c23, -std=gnu23, -Wc11-c23-compat options [PR10 (*)
  9837f62... nvptx: Use the usual '#define MAKE_DECL_ONE_ONLY(DECL) (DEC (*)
  9125969... tree-optimization/112405 - SIMD clone calls with (loop) mas (*)
  ffa0a73... RISC-V: Support FP round to i/l/ll diff size autovec (*)
  418bd64... RISC-V: Early expand DImode vec_duplicate in RV32 system (*)
  bf72d50... tree-optimization/111950 - vectorizer loop copying (*)
  3cc9ad4... tree-optimization/112404 - two issues with SLP of .MASK_LOA (*)
  9d1bf1d... C99 testsuite readiness: Some unverified test case un-reduc (*)
  4c1d3e2... gcc.c-torture/execute/builtins/fputs.c: fputs_unlocked prot (*)
  0c42741... internal-fn: Add VCOND_MASK_LEN. (*)
  89abbaa... explow: Avoid unnecessary alignment operations (*)
  a7a4536... explow: Allow dynamic allocations after vregs (*)
  17df6dd... libgfortran: Fix calloc call by swapping arg order [PR11236 (*)
  f463ef7... Avoid generating RTL code when d->testing_p. (*)
  3d654f9... libstdc++: Improve static assert messages for monadic opera (*)
  d803438... tree-optimization/112369 - strip_float_extensions and vecto (*)
  3f9ff6e... RISC-V: Adjust FP rint round tests for RV32 (*)
  4427157... middle-end/112296 - __builtin_constant_p and side-effects (*)
  b207529... rs6000: Consider inline asm as safe if no assembler complai (*)
  1a55724... RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrin (*)
  fd51471... Push no-evex512 target for 128/256 bit intrins (*)
  e9529ff... [PATCH 3/3] Change internal intrin call for AVX512 intrins (*)
  4bbabb2... [PATCH 2/3] Change internal intrin call for AVX512 intrins (*)
  fd79b41... [PATCH 1/3] Change internal intrin call for AVX512 intrins (*)
  459866e... Daily bump. (*)
  a5d2bb3... Testsuite, i386: Mark test as requiring dfp (*)
  4dbb14c... i386: Add LEGACY_INDEX_REG register class. (*)
  2d55ed2... mode-switching: Remove unused bbnum field (*)
  5bd1d54... read-rtl: Fix infinite loop while parsing [...] (*)
  5648446... openmp: Mention C attribute syntax in documentation (*)
  26cf069... openmp: Adjust handling of __has_attribute (omp::directive) (*)
  0e6f3e9... aarch64: Rework aarch64_modes_tieable_p [PR112105] (*)
  9acea43... RISC-V: Support FP rint to i/l/ll diff size autovec (*)
  53010f6... RISC-V: Fix bug of vlds attribute (*)
  eb4e1b6... Daily bump. (*)
  9eef85a... diagnostics: fix gcc-urlifier.cc bootstrap failure [PR11237 (*)
  ada871c... libstdc++: Remove redundant partial specialization in _Nth_ (*)
  51f9477... libstdc++: Use strerror_r in std::generic_category()::messa (*)
  6933c05... libstdc++: Replace "_N" in examples of naming conventions (*)
  8067caa... openmp: Add omp::decl support for C2X (*)
  40b9af0... openmp: Add support for omp::directive and omp::sequence at (*)
  8d22ac6... RISC-V: Remove HF modes of FP to INT rounding autovec (*)
  c5db4d8... diagnostics: add automatic URL-ification within messages (*)
  8200cd9... diagnostics: convert diagnostic_context to a class (*)
  38904b7... Daily bump. (*)
  6e9ee44... Reduce false positives for -Wnonnull for VLA parameters [PR (*)
  5340f48... Fortran: fix issue with multiple references of a procedure  (*)
  aed0069... vect: allow using inbranch simdclones for masked loops (*)
  ae8abcb... diagnostics: consolidate group-handling fields in diagnosti (*)
  413ac2c... Fortran: passing of allocatable/pointer arguments to OPTION (*)
  7ab79a4... Adjust operators equal and not_equal to check bitmasks agai (*)
  a291237... Remove simple ranges from trailing zero bitmasks. (*)
  751fc7b... i386: Handle multiple address register classes (*)
  e902dfb... Testcases for vectorizer peeling (*)
  95cfa2c... Cleanup vectorizable_live_operation (*)
  5926f30... GCN: Address undeclared 'NULL' usage in 'libgcc/config/gcn/ (*)
  4bfc509... Format gotools.sum closer to what DejaGnu does (*)
  b16845b... ARC: Improve DImode left shift by a single bit. (*)
  eb83605... aarch64: Remove unnecessary can_create_pseudo_p condition (*)
  60034ec... VECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask (*)
  c0cf9b7... tree-optimization/112366 - remove assert for failed live la (*)
  3881d01... Skip a number of 'g++.dg/tree-prof/' test cases for '-fno-e (*)
  94782ed... Skip a number of 'g++.dg/lto/' test cases for '-fno-excepti (*)
  e591995... Skip a number of 'g++.dg/compat/' test cases for '-fno-exce (*)
  fe65f4a... Skip a number of C++ test cases for '-fno-exceptions' testi (*)
  2266f7c... tree-optimization/112310 - code hoisting undefined behavior (*)
  8c8ad4e... Fortran: Defined operators with unlimited polymorphic args  (*)
  c3847ca... RISC-V: Refactor prefix [I/L/LL] rounding API autovec itera (*)
  5ea3c03... RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized code (*)
  1027c1c... Revert "RISC-V: Refactor prefix [I/L/LL] rounding API autov (*)
  9daed0b... Daily bump. (*)
  a29ce9b... RISC-V: Add check for types without insn reservations (*)
  7c1d011... Fortran: Fix for regression in ASSOCIATE [PR112316] (*)
  341c633... c++: use hash_set in nrv_data (*)
  ae07265... c++: retval dtor on rethrow [PR112301] (*)
  6afa984... libstdc++: Add assertion to std::string_view::remove_suffix (*)
  f432a59... c: Add missing conditions in Walloc-size to avoid ICEs [PR1 (*)
  04802ed... d: Merge upstream dmd, druntime 643b1261bb, phobos 1c98326e (*)
  8a4cde6... libstdc++: Fix warning during configure (*)
  0f9f3fc... [committed] Improve H8 sequences for single bit sign extrac (*)
  c71028c... analyzer: fix clang warnings [PR112317] (*)
  81a81ab... RISC-V: Refactor prefix [I/L/LL] rounding API autovec itera (*)
  d8ca8ed... doc: explicitly say 'lifetime' for DCE (*)
  f6284ef... RISC-V: Fix bug of AVL propagation PASS (*)
  01c18f5... ifcvt/vect: Emit COND_OP for conditional scalar reduction. (*)
  c05f748... tree-optimization/112320 - bougs debug IL after SCCP (*)
  1ae85e6... i386: Move stack protector patterns above mov $0 -> xor pee (*)
  36a2629... Make GCN target effective-target 'vect_gather_load_ifn' (*)
  1bb7d6f... Support cmul{_conj}v4hf3/cmla{_conj}v4hf4 with AVX512FP16 i (*)
  1c58566... c++: Implement C++26 P2361R6 - Unevaluated strings [PR11034 (*)
  4ea3607... RISC-V: Fix redundant attributes (*)
  d508a94... RISC-V: Support vcreate intrinsics for non-tuple types (*)
  88aca91... VECT: Refine the type size restriction of call vectorizer (*)
  1a0af6e... RISC-V: Allow dest operand and accumulator operand overlap  (*)
  c73d2d4... Daily bump. (*)
  4968e48... Minor formatting fix for newly-added file from previous com (*)
  2b9778c... Add files to discourage submissions of PRs to the GitHub mi (*)
  80b1a37... PR target/110551: Tweak mulx register allocation using peep (*)
  274c904... RISC-V: Use riscv_subword_address for atomic_test_and_set (*)
  ea2e7bf... RISC-V: Enable ztso tests on rv32 (*)
  7560f2b... RISC-V: fix TARGET_PROMOTE_FUNCTION_MODE hook for libcalls (*)
  d880e09... c: Add Walloc-size to warn about insufficient size in alloc (*)
  25f9217... Make genautomata.cc output reflect insn-attr.h expectation (*)
  ea4a3d0... omp: Reorder call for TARGET_SIMD_CLONE_ADJUST (*)
  64f3a19... i386: Fix stack protector peephole2 operand predicate [PR11 (*)
  7480dbb... i386: Improve stack protector patterns and peephole2s (*)
  9693459... PR modula2/102989: reimplement overflow detection in ztype  (*)
  084ea7e... RISC-V: Support vundefine intrinsics for tuple types (*)
  c9bb20f... NFC: Fix whitespace (*)
  eac0917... Daily bump. (*)
  37e1634... analyzer: move class record_layout to its own .h/.cc (*)
  b0f1933... libcpp: eliminate MACRO_MAP_EXPANSION_POINT_LOCATION (*)
  8b4ac02... opts.cc: fix comment about DOCUMENTATION_ROOT_URL (*)
  b9e2088... pretty-print: gracefully handle null URLs (*)
  f66b2fc... VECT: Support SLP MASK_LEN_GATHER_LOAD with conditional mas (*)
  327d38f... bpf: Improvements in CO-RE builtins implementation. (*)
  0f1727e... gcc: config: microblaze: fix cpu version check (*)
  2b19c38... RISC-V: Require a extension for testcases with atomic insns (*)
  b93fddb... RISC-V: Let non-atomic targets use optimized amo loads/stor (*)
  60d6c63... riscv: thead: Add support for the XTheadFMemIdx ISA extensi (*)
  2d65622... riscv: thead: Add support for the XTheadMemIdx ISA extensio (*)
  c82f123... rs6000, Add missing overloaded bcd builtin tests, documenta (*)
  f694960... gcc: config: microblaze: fix cpu version check (*)
  9119b00... [RA]: Fixing LRA cycling for multi-reg variable containing  (*)
  3e888f9... Add OpenACC 'acc_map_data' variant to 'libgomp.oacc-c-c++-c (*)
  5de05bd... RISC-V: Add vector fmin/fmax expanders. (*)
  1843780... genemit: Split insn-emit.cc into several partitions. (*)
  1540401... hardcfr: support checking at abnormal edges [PR111943] (*)
  e3da1d7... tree-optimization/112305 - SCEV cprop and conditional undef (*)
  1cf5dc0... d: Clean-up unused variable assignments after interface cha (*)
  6bf2ceb... LoongArch: Define HAVE_AS_TLS to 0 if it's undefined [PR112 (*)
  5ee961b... RISC-V: Add assert of the number of vmerge in autovec cond  (*)
  711d703... match.pd: Support combine cond_len_op + vec_cond similar to (*)
  9cc2b97... Fix incorrect option mask and avx512cd target push (*)
  5ee8941... RISC-V: Add the missed combine of [u]int64 -> _Float16 and  (*)
  f5d33d0... Fix wrong code due to incorrect define_split (*)
  541b754... MATCH: Add some more value_replacement simplifications to m (*)
  598fdb5... MATCH: first of the value replacement moving from phiopt (*)
  a5c157b... Daily bump. (*)
  94c0b26... i386: Zhaoxin yongfeng enablement (*)
  6504b4a... libstdc++: [_GLIBCXX_INLINE_VERSION] Add comment on emul TL (*)
  5ea1170... libstdc++: [_GLIBCXX_INLINE_VERSION] Un-weak handle_contrac (*)
  434975c... configure, fixincludes: Add change missed in r14-4825. (*)
  997c821... ipa: Prune any IPA-CP aggregate constants known by modref t (*)
  1437df4... ipa-cp: Templatize filtering of m_agg_values (*)
  68880e4... RISC-V: Make rv32i_zcmp testcase more robust (*)
  a3da9ad... ARC: Convert (signed<<31)>>31 to -(signed&1) without barrel (*)
  31cc982... ARC: Improved ARC rtx_costs/insn_cost for SHIFTs and ROTATE (*)
  d24c3c5... ARC: Improved SImode shifts and rotates with -mswap. (*)
  fb1941d... arm: move the switch tables for Arm to the RO data section. (*)
  7666d94... Testsuite, i386: Mark test as requiring ifunc (*)
  89e97f6... Testsuite, Darwin: Fix trampoline warning (*)
  5c7bbb0... Testsuite, i386: Fix test by passing -march (*)
  a0c5576... Testsuite, Darwin: skip PIE test (*)
  36a52cd... rs6000: Change bitwise xor to an equality operator [PR10690 (*)
  ff4cea0... PR testsuite/111462 - add powerpc64le to list of ssa-sink-1 (*)
  eb1cdb3... RISC-V: Fix bugs of handling scalar of SEW64 vx instruction (*)
  f3e44d0... Fortran: Fix a problem with SELECT TYPE selectors [PR104555 (*)
  8c40b72... Improve memcmpeq for 512-bit vector with vpcmpeq + kortest. (*)
  8111b5c... Expand: Checking available optabs for scalar modes in by pi (*)
  39a11d8... Daily bump. (*)
  3c444fb... libstdc++: [_GLIBCXX_INLINE_VERSION] Add emul TLS symbols (*)
  5d1b723... libstdc++: [_GLIBCXX_INLINE_VERSION] Provide handle_contrac (*)
  ea8ffdc... d: Fix ICE: verify_gimple_failed (conversion of register to (*)
  e773c6c... d: Merge upstream dmd, druntime e48bc0987d, phobos 2458e8f8 (*)
  c6929b0... testsuite, X86, Darwin: Skip a test for mcmodel=large. (*)
  78491be... testsuite, X86, Darwin: Skip tests with incompatible output (*)
  d967578... tree-optimization/109334: Improve computation for access at (*)
  cc7aca8... gcc: xtensa: fix salt/saltu version check (*)
  b8b63e8... RISC-V: Fix one range-loop-construct warning of avlprop (*)
  b0f7029... Daily bump. (*)
  10f1489... d: Fix ICE: in verify_gimple_in_seq on powerpc-darwin9 [PR1 (*)
  5d2a360... d: Add warning for call expression without side effects (*)
  7f974c5... Daily bump. (*)
  4d3d2cd... [RA]: Fixing i686 bootstrap failure because of pushing the  (*)
  92fcbe8... RISC-V: Make stack_save_restore_2 more robust (*)
  32cc0b8... PR modula2/112110: fails to build on freebsd when compiling (*)
  c6430d3... Fortran: diagnostics of MODULE PROCEDURE declaration confli (*)
  9f3c4c6... amdgcn: Fix bug in gfx1030 support patch (*)
  9ae1fbd... amdgcn: silence warnings (*)
  2672c60... recog: Fix propagation into ASM_OPERANDS (*)
  6ff8b93... c++: another build_new_1 folding fix [PR111929] (*)
  68e97c5... c++: add testcase verifying non-dep new-expr checking (*)
  0f2e208... c++: more ahead-of-time -Wparentheses warnings (*)
  e5f6a5a... PR modula2/111530: Build failure on BSD due to getopt_long_ (*)
  7bcdb77... [PATCH] RISC-V: Fix wrong tune parameters on int_div (*)
  9c03221... RISC-V: Add rawmemchr expander. (*)
  3351ec2... RISC-V: Fix cond_sqrt tests. (*)
  8aa4771... [RA]: Add cost calculation for reg equivalence invariants (*)
  0beb161... i386: Fiy typo in "partial_memory_read_stall" tune option. (*)
  8da9146... Move OpenMP tests to gomp subdir (*)
  372e2d6... aarch64: Add basic target_print_operand support for CONST_S (*)
  89e5d90... PR target/110551: Fix reg allocation for widening multiplic (*)
  8697d3a... preprocessor: c++: Support `#pragma GCC target' macros [PR8 (*)
  b038e20... Fortran: Fix some problems with SELECT TYPE selectors [PR10 (*)
  a5e69e9... MATCH: Simplify `(X &| B) CMP X` if possible [PR 101590] (*)
  7eed861... Support vec_cmpmn/vcondmn for v2hf/v4hf. (*)
  ecca503... Daily bump. (*)
  446efa5... RISC-V: Move lmul calculation into macro (*)
  e37bc2c... RISC-V: Add AVL propagation PASS for RVV auto-vectorization (*)
  0c305f3... libstdc++: Fix exception thrown by std::shared_lock::unlock (*)
  7d06b29... libstdc++: Add dg-timeout-factor to <chrono> IO tests (*)
  cd7dadc... Add attribute((null_terminated_string_arg(PARAM_IDX))) (*)
  46f51bd... testsuite, aarch64: Normalise options to aarch64.exp. (*)
  8a1fcca... testsuite, Darwin: Adjust target test for modern OS. (*)
  662655e... match: Simplify `a != C1 ? abs(a) : C2` when C2 == abs(C1)  (*)
  abd78dc... Add effective target to OpenMP tests (*)
  3c8abce... [range-op] Remove unused variable in fold_range. (*)
  848b5f3... [range-ops] Remove unneeded parameters from rv_fold. (*)
  24e97ac... [range-ops] Add frange& argument to rv_fold. (*)
  4d49685... RISC-V: Pass abi to g++ rvv testsuite (*)
  d8ff4b9... libatomic: Consider '--with-build-sysroot=[...]' for target (*)
  967d417... libffi: Consider '--with-build-sysroot=[...]' for target li (*)
  8a0fcee... testsuite: Allow general skips/requires in PCH tests (*)
  7006e5d... arm: Use deltas for Arm switch tables (*)
  2ae00ad... Darwin: Make metadata symbol lables linker-visible for GNU  (*)
  f55cdce... [RA]: Modfify cost calculation for dealing with equivalence (*)
  8d2130a... Fortran: Fix incompatible types between INTEGER(8) and TYPE (*)
  a4ca869... DOC: Update COND_LEN document (*)
  d1bb956... PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound (*)
  2f592b7... Pass type of comparison operands instead of comparison resu (*)
  60c11c9... LoongArch:Enable vcond_mask_mn expanders for SF/DF modes. (*)
  88df58b... testsuite: Fix _BitInt in gcc.misc-tests/godump-1.c (*)
  3dfe7e2... More '#ifdef ASM_OUTPUT_DEF' -> 'if (TARGET_SUPPORTS_ALIASE (*)
  33d38b4... set hardcmp eh probs (*)
  2f398d1... rename make_eh_edges to make_eh_edge (*)
  f75fc1f... Daily bump. (*)
  da9e72f... Darwin: Handle the fPIE option specially. (*)
  8f62ce1... config, aarch64: Use a more compatible sed invocation. (*)
  1aa9f1c... tree: update address_space comment (*)
  668c4c3... AArch64: Improve immediate generation (*)
  406709b... c++: improve comment (*)
  678e6c3... i386: Narrow test instructions with immediate operands [PR1 (*)
  f7dbf62... Faster irange union for appending ranges. (*)
  4912418... LoongArch: Fix vfrint-releated comments in lsxintrin.h and  (*)
  1b30ef7... LoongArch: Implement __builtin_thread_pointer for TLS. (*)
  fb28d5c... c++: add fixed testcase [PR99804] (*)
  ac66744... jit: dump string literal initializers correctly (*)
  f32c1e1... libstdc++: Build libstdc++_libbacktrace.a as PIC [PR111936] (*)
  8bb655d... PR modula2/111955 introduce isnan support to Builtins.def (*)
  cfb7755... rtl-ssa: Add new helper functions (*)
  39cac7c... rtl-ssa: Extend make_uses_available (*)
  d7266f6... rtl-ssa: Use frequency-weighted insn costs (*)
  cc15a0f... rtl-ssa: Handle call clobbers in more places (*)
  ba97d0e... rtl-ssa: Calculate dominance frontiers for the exit block (*)
  adf1b36... rtl-ssa: Handle artifical uses of deleted defs (*)
  60ef0d2... rtl-ssa: Fix ICE when deleting memory clobbers (*)
  d5e0321... rtl-ssa: Create REG_UNUSED notes after all pending changes (*)
  01b42e9... rtl-ssa: Ensure global registers are live on exit (*)
  7b2ae64... Handle OpenACC 'self' clause for compute constructs in Open (*)
  047841a... Extend test suite coverage for OpenACC 'self' clause for co (*)
  a5e9190... Consistently order 'OMP_CLAUSE_SELF' right after 'OMP_CLAUS (*)
  8064e7e... RISC-V: Export some functions from riscv-vsetvl to riscv-v[ (*)
  c92509d... Disentangle handling of OpenACC 'host', 'self' pragma token (*)
  76cc546... Enable 'c-c++-common/goacc/{if,self}-clause-1.c' for C++ (*)
  3a35963... OpenACC 2.7: Implement self clause for compute constructs (*)
  fa68e04... OpenMP/Fortran: Group handling of 'if' clause without and w (*)
  5e71499... RISC-V: Change MD attribute avl_type into avl_type_idx[NFC] (*)
  6fa7284... c++: error with bit-fields and scoped enums [PR111895] (*)
  444a485... Daily bump. (*)
  5dbcc40... modula2: tidyup M2Dependent.mod (*)
  d80a26c... c++: non-dep array new-expr size [PR111929] (*)
  51f164f... c++: cp_stabilize_reference and non-dep exprs [PR111919] (*)
  c1eee80... libstdc++: Include cstdarg in freestanding (*)
  23ddfa1... modula2: gcc/m2/gm2-libs/M2Dependent.mod initialize all rec (*)
  1fa7bcf... recog/reload: Remove old UNARY_P operand support (*)
  e6fdea8... gcc: fix typo in comment in gcov-io.h (*)
  99a6c10... i386: Fine tune STV register conversion costs for -Os. (*)
  35f4e95... ARC: Improved SImode shifts and rotates on !TARGET_BARREL_S (*)
  326a8c0... testsuite: Fix gcc.target/arm/mve/mve_vadcq_vsbcq_fpscr_ove (*)
  2287fa2... arc: Remove mpy_dest_reg_operand predicate (*)
  0fc13e8... Improve factor_out_conditional_operation for conversions an (*)
  452c4f3... match: Fix the `popcnt(a&b) + popcnt(a|b)` pattern for type (*)
  3e90161... rtl-ssa: Avoid creating duplicated phis (*)
  d0eb4ac... rtl-ssa: Don't insert after insns that can throw (*)
  c97b167... rtl-ssa: Fix handling of deleted insns (*)
  50313dc... rtl-ssa: Fix null deref in first_any_insn_use (*)
  58de8e9... i386: Avoid paradoxical subreg dests in vector zero_extend (*)
  cc47795... i386: Fix unprotected REGNO in aeswidekl_operation (*)
  21416ca... aarch64: Define TARGET_INSN_COST (*)
  b632a51... aarch64: Avoid bogus atomics match (*)
  b44d4ff... RISC-V: Fix ICE of RVV vget/vset intrinsic[PR111935] (*)
  eaf7515... libgcc: make heap-based trampolines conditional on libc pre (*)
  724badc... Remove obsolete debugging formats from names list (*)
  7b2984a... RISC-V: Fix ICE of RTL CHECK on VSETVL PASS[PR111947] (*)
  9cf2e74... Daily bump. (*)
  cb05acd... libcpp: Improve the diagnostic for poisoned identifiers [PR (*)
  02aa322... compiler: move Selector_expression up in file (*)
  597dba8... compiler: make xx_constant_value methods non-const (*)
  45a5ab0... compiler: pass gogo to Runtime::make_call (*)
  ac50e9b... compiler: add Expression::is_untyped method (*)
  2621bd1... syscall: add missing type conversion (*)
  32b74c9... vect: Allow same precision for bit-precision conversions. (*)
  82bbbb7... RISC-V: Add popcount fallback expander. (*)
  458db9b... tree-optimization/111916 - SRA of BIT_FIELD_REF of constant (*)
  00eb081... tree-optimization/111915 - mixing grouped and non-grouped a (*)
  738d443... ipa/111914 - perform parameter init after remapping types (*)
  538dcde... configure, libquadmath: Remove unintended AC_CHECK_LIBM [PR (*)
  267e369... SH: Fix PR 111001 (*)
  9ed6b22... middle-end: don't keep .MEM guard nodes for PHI nodes who d (*)
  1acd457... move the (a-b) CMP 0 ? (a-b) : (b-a) optimization from fold (*)
  85e930a... Use error_mark_node after error in convert (*)
  13c0d05... convert_to_complex vs invalid_conversion [PR111903] (*)
  d96bd4a... tree-optimization/111917 - bougs IL after guard hoisting (*)
  0c4bd13... RISC-V: Fix ICE for the fusion case from vsetvl to scalar m (*)
  09c9de0... RISC-V: Remove unnecessary asm check for vec cvt (*)
  0093821... libatomic: drop redundant all-multi command (*)
  996785d... RISC-V: Bugfix for merging undef tmp register for trunc (*)
  e1b1cba... LoongArch: Document -mexplicit-relocs={auto,none,always} (*)
  83e24e8... LoongArch: Use explicit relocs for addresses only used for  (*)
  95db62f... LoongArch: Use explicit relocs for TLS access with -mexplic (*)
  8811630... LoongArch: Use explicit relocs for GOT access when -mexplic (*)
  93a46d1... LoongArch: Add enum-style -mexplicit-relocs= option (*)
  4cd4c34... RISC-V: Fix typo[VSETVL PASS] (*)
  0e29c6f... gcc.c-torture/execute/builtins/pr93262-chk.c: Remove return (*)
  c2d41cd... RISC-V: Remove unnecessary asm check for binop constraint (*)
  7846d22... RISC-V: Remove unnecessary asm check for rounding autovec (*)
  75322a6... RISC-V: Fix AVL_TYPE attribute of tuple mode mov<mode> (*)
  1908775... vect: Cost adjacent vector loads/stores together [PR111784] (*)
  1df490e... i386: Prevent splitting to xmm16+ when !TARGET_AVX512VL (*)
  85858c7... RISC-V: Bugfix for merging undefined tmp register in math (*)
  a6e74b0... compiler: remove traverse_assignments pass (*)
  1a1fba1... compiler: remove name_ field from Type_switch_statement (*)
  b513aa2... compiler: pass Gogo to determine types pass (*)
  5697ed0... LoongArch: Define macro CLEAR_INSN_CACHE. (*)
  f08ca59... Expand: Enable vector mode for by pieces compares (*)
  dbde384... Avoid compile time hog on vect_peel_nonlinear_iv_init for n (*)
  93a65e0... Remove unused mmx_pinsrw. (*)
  3b63274... Daily bump. (*)
  bcc5054... aarch64: Emit csinv again for `a ? ~b : b` [PR110986] (*)
  c9ae68f... d: Merge upstream dmd f4be7f6f7b. (*)
  80ddcb9... objc++: type/expr tsubst conflation [PR111920] (*)
  47b634a... Doc: document the new Darwin options (*)
  a0673ec... Testsuite: allow non-installed testing on darwin (*)
  8fe73ef... Darwin, rpaths: Add --with-darwin-extra-rpath. (*)
  6a6d381... Config,Darwin: Allow for configuring Darwin to use embedded (*)
  829b0c4... Driver: Provide a spec to insert rpaths for compiler lib di (*)
  8abddb1... libgcc: support heap-based trampolines (*)
  cbf6da1... target: Support heap-based trampolines (*)
  28d8c68... core: Support heap-based trampolines (*)
  11f5071... RISC-V: Prohibit combination of 'E' and 'H' (*)
  f232391... RISC-V: 'Zfa' extension is now ratified (*)
  bc43a9e... Daily bump. (*)
  405a414... libstdc++: Split std::basic_string::_M_use_local_data into  (*)
  be34a8b... libstdc++: Workaround for LLVM-61763 in <ranges> (*)
  59a7d38... libstdc++: testsuite: Enhance codecvt_unicode with tests fo (*)
  77209d4... libstdc++: Fix formatting of filesystem directory iterators (*)
  57cbb1d... C99 testsuite readiness: Compile more tests with -std=gnu89 (*)
  66c26e5... RISC-V: Support partial VLS mode when preference fixed-vlma (*)
  6f684dd... Daily bump. (*)
  e288696... PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md (*)
  55731b5... c++: abstract class and overload resolution (*)
  7d4e991... testsuite: constexpr-diag1.C and implicit constexpr (*)
  ff04531... c++: fix tourney logic (*)
  084addf... c++: Constructor streaming [PR105322] (*)
  7069ea9... c: -Wint-conversion should cover pointer/integer mismatches (*)
  857a6ee... c: -Wincompatible-pointer-types should cover mismatches in  (*)
  8f75e6c... bootstrap: tm_p.h requires memmodel.h on SPARC. (*)
  281699f... c-family: char8_t and aliasing in C vs C++ [PR111884] (*)
  a663fe6... bootstrap: Include tm_p.h (*)
  5ac53c0... rust: build failure after NON_DEPENDENT_EXPR removal [PR111 (*)
  1d9263f... libstdc++: add casts to from_chars in <charconv> [PR111883] (*)
  24cf1f6... ifcvt: Don't lower bitfields with non-constant offsets [PR  (*)
  c29d552... c++: rename tsubst_copy_and_build and tsubst_expr (*)
  3e3d73e... c++: merge tsubst_copy into tsubst_copy_and_build (*)
  909672f... c++: non-static memfn call dependence cleanup [PR106086] (*)
  cd0e05b... c++: remove NON_DEPENDENT_EXPR, part 2 (*)
  dad3118... c++: remove NON_DEPENDENT_EXPR, part 1 (*)
  eb15fad... middle-end: don't pass loop_vinfo to vect_set_loop_conditio (*)
  a1fc2cc... tree-optimization/111383 - testcase for fixed PR (*)
  9692309... tree-optimization/111445 - simple_iv simplification fault (*)
  44e7e44... tree-optimization/110243 - IVOPTs introducing undefined ove (*)
  d70575f... tree-optimization/111891 - fix assert in vectorizable_simd_ (*)
  c7ec7bd... amdgcn: add -march=gfx1030 EXPERIMENTAL (*)
  d118738... tree-optimization/111000 - restrict invariant motion of shi (*)
  551935d... Control flow redundancy hardening (*)
  e90c7bd... rtl-ssa: Don't leave NOTE_INSN_DELETED around (*)
  d6add7a... Document {L,R}ROTATE_EXPR (*)
  1d0ca7e... SH: Fix PR 101177 (*)
  e489464... Rewrite more refs for epilogue vectorization (*)
  5dde647... Fixup vect_get_and_check_slp_defs for gathers and .MASK_LOA (*)
  5f71e00... omp_lib.f90.in: Deprecate omp_lock_hint_* for OpenMP 5.0 (*)
  4fd09ae... RISC-V: Rename some variables of vector_block_info[NFC] (*)
  88c2707... ifcvt: Support bitfield lowering of multiple-exit loops (*)
  dd3e6f5... middle-end: Enable bit-field vectorization to work correctl (*)
  8ba8f0d... Fix testcases that are raised by support -mevex512 (*)
  f0e28d8... RISC-V: Fix failed hoist in LICM of vmv.v.x instruction (*)
  29331e7... RISC-V: Refactor and cleanup vsetvl pass (*)
  df252e0... return edge in make_eh_edges (*)
  1d260ab... c++: indirect change of active union member in constexpr [P (*)
  b69ee50... c++: Improve diagnostics for constexpr cast from void* (*)
  c85f748... Daily bump. (*)
  4d81962... c++: small tweak for cp_fold_r (*)
  86d0b08... doc: Update contrib.texi (*)
  d8e4e7d... vect: Use inbranch simdclones in masked loops (*)
  8b704ed... vect: don't allow fully masked loops with non-masked simd c (*)
  c9ce846... vect: Fix vect_get_smallest_scalar_type for simd clones (*)
  53d4085... parloops: Allow poly nit and bound (*)
  87d97e2... parloops: Copy target and optimizations when creating a fun (*)
  79a50a1... omp: Replace simd_clone_subparts with TYPE_VECTOR_SUBPARTS (*)
  c714b4d... libstdc++: [_Hashtable] Do not reuse untrusted cached hash  (*)
  2454ba9... c: Fix ICE when an argument was an error mark [PR100532] (*)
  9f33e4c... c: Don't warn about converting NULL to different sso endian (*)
  00e7c49... ABOUT-GCC-NLS: add usage guidance (*)
  1ec36bc... diagnostic: rename new permerror overloads (*)
  f53de2b... c++: use G_ instead of _ (*)
  04d6c74... ada: Support new SPARK aspect Side_Effects (*)
  c1fbfe5... ada: Refactor code to remove GNATcheck violation (*)
  0f3c634... ada: Add pragma Annotate for GNATcheck exemptions (*)
  1555d18... ada: Document gnatbind -Q switch (*)
  0c29a99... ada: Seize opportunity to reuse List_Length (*)
  7b1b787... ada: Simplify "not Present" with "No" (*)
  19cc4b9... c++: Make -Wunknown-pragmas controllable by #pragma GCC dia (*)
  202a214... libcpp: testsuite: Add test for fixed _Pragma bug [PR82335] (*)
  217a0fc... middle-end: don't create LC-SSA PHI variables for PHI nodes (*)
  beab5b9... tree-optimization/111131 - SLP for non-IFN gathers (*)
  b068886... Refactor x86 vectorized gather path (*)
  947fb34... aarch64: Generalise TFmode load/store pair patterns (*)
  61ea0a8... aarch64, testsuite: Fix up pr71727.c (*)
  cf776ee... aarch64, testsuite: Tweak sve/pcs/args_9.c to allow stps (*)
  583ca5f... aarch64, testsuite: Prevent stp in lr_free_1.c (*)
  505f120... rtl-ssa: Support inferring uses of mem in change_insns (*)
  ba230aa... rtl-ssa: Add entry point to allow re-parenting uses (*)
  c95aab2... rtl-ssa: Add drop_memory_access helper (*)
  c338083... rtl-ssa: Fix bug in function_info::add_insn_after (*)
  faa0e82... x86: Correct ISA enabled for clients since Arrow Lake (*)
  56ed105... amdgcn: deprecate Fiji device and multilib (*)
  8f4bbdc... LoongArch:Implement the new vector cost model framework. (*)
  0881389... LoongArch:Implement vec_widen standard names. (*)
  a7b7284... LoongArch:Implement avg and sad standard names. (*)
  0308461... Daily bump. (*)
  b20dbdd... Fix expansion of `(a & 2) != 1` (*)
  879c91f... [c] Fix PR 101364: ICE after error due to diagnose_arglist_ (*)
  11e6bce... Fix ICE due to c_safe_arg_type_equiv_p not checking for err (*)
  3ec8ecb... PR111648: Fix wrong code-gen due to incorrect VEC_PERM_EXPR (*)
  fe9767e... pru: Implement TARGET_INSN_COST (*)
  67f7bf7... LibF7: Implement mul_mant for devices without MUL instructi (*)
  ff05a3e... aarch64: Replace duplicated selftests (*)
  bc4bd69... cse: Workaround GCC < 5 bug in cse_insn [PR111852] (*)
  ef10cb8... diagnostic: add permerror variants with opt (*)
  af4bb22... OpenMP: Avoid ICE with LTO and 'omp allocate' (*)
  f1744dd... tree-ssa-math-opts: Fix up match_uaddc_usubc [PR111845] (*)
  d396176... nvptx: Use fatal_error when -march= is missing not an asser (*)
  a4184c8... Darwin: Check as for .build_version support and use it if a (*)
  dd28f90... ifcvt: rewrite args handling to remove lookups (*)
  04227ac... AArch64: Rewrite simd move immediate patterns to new syntax (*)
  b0fe8f2... middle-end: ifcvt: Allow any const IFN in conditional block (*)
  4b39aee... middle-end: Fold vec_cond into conditional ternary or binar (*)
  b588dcb... LoongArch: Use fcmp.caf.s instead of movgr2cf for zeroing a (*)
  b0372ef... Re-instantiate integer mask to traditional vector mask supp (*)
  60c231c... middle-end: maintain LCSSA throughout loop peeling (*)
  0c85228... middle-end: updated niters analysis to handle multiple exit (*)
  d65e38e... middle-end: Refactor vectorizer loop conditionals and separ (*)
  46937e1... middle-end: refactor vectorizable_comparison to make the ma (*)
  c51040c... RISC-V: Optimize consecutive permutation index pattern by v (*)
  372c5da... fortran/intrinsic.texi: Add 'intrinsic' to SIGNAL example (*)
  f019251... Initial Panther Lake Support (*)
  2aa97c0... x86: Add m_CORE_HYBRID for hybrid clients tuning (*)
  7370c47... Initial Clearwater Forest Support (*)
  cead92b... Support 32/64-bit vectorization for _Float16 fma related op (*)
  cf7739d... RISC-V: Enable more tests for dynamic LMUL and bug fix[PR11 (*)
  fb69acf... Daily bump. (*)
  773306e... aarch64: Put LR save slot first in more cases (*)
  5758585... aarch64: Use vecs to store register save order (*)
  aeb3f04... Handle epilogues that contain jumps (*)
  5e4abf4... ssa_name_has_boolean_range vs signed-boolean:31 types (*)
  1fbb7d7... c++: accepts-invalid with =delete("") [PR111840] (*)
  765c3b8... c++: Fix compile-time-hog in cp_fold_immediate_r [PR111660] (*)
  bac21b7... c++: mangling tweaks (*)
  4f87000... c++: Add missing auto_diagnostic_groups to constexpr.cc (*)
  9cad427... RISC-V/testsuite/pr111466.c: update test and expected outpu (*)
  1f186f6... c: error for function with external and internal linkage [P (*)
  5ac63ec... Fortran: out of bounds access with nested implied-do IO [PR (*)
  43c2f85... fortran/intrinsic.texi: Improve SIGNAL intrinsic entry (*)
  b18d1ca... MATCH: [PR111432] Simplify `a & (x | CST)` to a when we kno (*)
  da65efe... LibF7: Re-generate f7-renames.h to pick up white-space from (*)
  305034e... tree-cfg: Add count information when creating new bb in mov (*)
  ef6696a... PR modula2/111756: Re-building all-gcc after source changes (*)
  323209c... tree-optimization/111846 - put simd-clone-info into SLP tre (*)
  fbdf88a... wide-int-print: Don't print large numbers hexadecimally for (*)
  5bb79a4... RISC-V: Fix failed testcase when use -cmodel=medany (*)
  c4e773b... LibF7: Implement fma / fmal. (*)
  ce55521... middle-end/111818 - failed DECL_NOT_GIMPLE_REG_P setting of (*)
  3aaf704... tree-optimization/111807 - ICE in verify_sra_access_forest (*)
  8eb9cdd... expr: don't clear SUBREG_PROMOTED_VAR_P flag for a promoted (*)
  38ad4ad... LoongArch: Fix vec_initv32qiv16qi template to avoid ICE. (*)
  b20c7ee... LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NO (*)
  b25b43c... RISC-V: Fix unexpected big LMUL choosing in dynamic LMUL mo (*)
  ef8f7e3... d: Forbid taking the address of an intrinsic with no implem (*)
  e16ace7... Daily bump. (*)
  b626751... Fix minor problem in stack probing (*)
  04013e4... diagnostics: special-case -fdiagnostics-text-art-charset=as (*)
  f8644b6... diagnostics: fix missing initialization of context->extra_o (*)
  1a64156... i386: Allow -mlarge-data-threshold with -mcmodel=large (*)
  3287456... RISC-V: NFC: Move scalar block move expansion code into ris (*)
  c927377... RISC-V/testsuite: add a default march (lacking zfa) to some (*)
  04c9cf5... Implement new RTL optimizations pass: fold-mem-offsets (*)
  964fd40... d: Merge upstream dmd, druntime 4c18eed967, phobos d945686a (*)
  c7609ac... MATCH: Improve `A CMP 0 ? A : -A` set of patterns to use bi (*)
  29a4453... [PR31531] MATCH: Improve ~a < ~b and ~a < CST, allow a nop  (*)
  7550130... c++: improve fold-expr location (*)
  a22eeac... c++: fix truncated diagnostic in C++23 [PR111272] (*)
  817a701... ARC: Split asl dst,1,src into bset dst,0,src to implement 1 (*)
  d6ebe61... s390: Fix expander popcountv8hi2_vx (*)
  a5fe9f0... RISC-V: Use VLS modes if the NITERS is known and smaller th (*)
  b7a28c0... use more get_range_query (*)
  e6d0630... Support 32/64-bit vectorization for conversion between _Flo (*)
  96f12b9... Enable vectorization for V2HF/V4HF rounding operations and  (*)
  d5cfabc... Daily bump. (*)
  643a522... libgomp.texi: Update "Enabling OpenMP" + OpenACC / invoke.t (*)
  67f5d36... libgomp.texi: Improve "OpenACC Environment Variables" (*)
  15886c0... libgomp.texi: Use present not future tense (*)
  ade39f9... sim: add distclean dep for gnulib (*)
  accccbf... middle-end: Improved RTL expansion of 1LL << x. (*)
  5c46cd8... modula2: Add m2.etags rule to gcc/m2/Make-lang.in (*)
  3bcc10b... wide-int: Fix estimation of buffer sizes for wide_int print (*)
  ac90823... d: Merge upstream dmd, druntime f9efc98fd7, phobos a3f22129 (*)
  648d307... combine: Fix handling of unsigned constants (*)
  77faa3e... RISC-V: Fix vsingle attribute (*)
  b3cb98d... Daily bump. (*)
  fd6b17a... libgomp.fortran/allocate-6.f90: Run with -fdump-tree-gimple (*)
  578afbc... Fix ICE in set_cell_span, at text-art/table.cc:148 with D f (*)
  06d8aee... d: Reduce code duplication of writing generated files. (*)
  bc238c4... libgomp.texi: Note to 'Memory allocation' sect and missing  (*)
  969f5c3... Fortran: Support OpenMP's 'allocate' directive for stack va (*)
  cb01192... middle-end: Allow _BitInt(65535) [PR102989] (*)
  78dd49f... RISC-V: Remove redundant iterators. (*)
  300d7d3... Daily bump. (*)
  d78fef5... Fortran: name conflict between internal procedure and deriv (*)
  458c253... fortran: fix handling of options -ffpe-trap and -ffpe-summa (*)
  8be20f3... Do not add partial equivalences with no uses. (*)
  3179ad7... OMP SIMD inbranch call vectorization for AVX512 style masks (*)
  63eaccd... Add support for SLP vectorization of OpenMP SIMD clone call (*)
  8544efd... RISC-V Regression: Fix FAIL of bb-slp-68.c for RVV (*)
  9a82cca... RISC-V: Refine run test cases of math autovec (*)
  8c5447a... RISC-V: Add test for FP llfloor auto vectorization (*)
  9d67561... RISC-V: Add test for FP ifloor auto vectorization (*)
  2943c50... RISC-V: Add test for FP iceil auto vectorization (*)
  ad0bac8... RISC-V: Add test for FP llceil auto vectorization (*)
  24eaada... C99 testsuite readiness: Some verified test case adjustment (*)
  0fef2c8... C99 test suite readiness: Some unverified test case adjustm (*)
  1c23bfd... C99 test suite readiness: Mark some C89 tests (*)
  cf611de... or1k: Fix -Wincompatible-pointer-types warning during libgc (*)
  dab4f3e... arc: Fix -Wincompatible-pointer-types warning during libgcc (*)
  fbd3923... riscv: Fix -Wincompatible-pointer-types warning during libg (*)
  6e5216e... csky: Fix -Wincompatible-pointer-types warning during libgc (*)
  bdbca40... m68k: Avoid implicit function declaration in libgcc (*)
  badb798... libstdc++: Fix tr1/8_c_compatibility/cstdio/functions.cc re (*)
  6decda1... tree-optimization/111779 - Handle some BIT_FIELD_REFs in SR (*)
  35b5bb4... tree-optimization/111773 - avoid CD-DCE of noreturn special (*)
  6b58056... RISC-V: Add test for FP llround auto vectorization (*)
  2a89656... RISC-V Regression: Fix FAIL of bb-slp-pr69907.c for RVV (*)
  d53d20a... RISC-V: Add test for FP iroundf auto vectorization (*)
  0f40e59... RISC-V: Fix the riscv_legitimize_poly_move issue on targets (*)
  f0b0507... RISC-V: Leverage stdint-gcc.h for RVV test cases (*)
  8f52040... RISC-V: Support FP lfloor/lfloorf auto vectorization (*)
  ba0cde8... testsuite: Replace many dg-require-thread-fence with dg-req (*)
  2a4d9e4... testsuite: Add dg-require-atomic-cmpxchg-word (*)
  f9ef2e6... Daily bump. (*)
  51f7bfa... RISC-V: Support FP lceil/lceilf auto vectorization (*)
  611eef7... PR111778, PowerPC: Do not depend on an undefined shift (*)
  8bd11fa... libgomp.texi: Clarify OMP_TARGET_OFFLOAD=mandatory (*)
  f150717... reg-notes.def: Fix up description of REG_NOALIAS (*)
  d8c3ace... RISC-V: Make xtheadcondmov-indirect tests robust against in (*)
  53a9407... wide-int: Fix build with gcc < 12 or clang++ [PR111787] (*)
  e99ad40... RISCV: Bugfix for incorrect documentation heading nesting (*)
  de593b3... AArch64: Fix Armv9-a warnings that get emitted whenever a A (*)
  fb590e4... wide-int: Add simple CHECKING_P stack-protector canary like (*)
  0d00385... wide-int: Allow up to 16320 bits wide_int and change widest (*)
  cd0185b... LibF7: Implement atan2. (*)
  2cc4f58... RISC-V: Support FP lround/lroundf auto vectorization (*)
  dfb4085... dwarf2out: Stop using wide_int in GC structures (*)
  05f9831... tree-optimization/111764 - wrong reduction vectorization (*)
  5fbd91b... Support Intel USER_MSR (*)
  3948844... LoongArch: Modify check_effective_target_vect_int_mod accor (*)
  a2a51b6... LoongArch: Enable vect.exp for LoongArch. [PR111424] (*)
  3c23183... LoongArch: Adjust makefile dependency for loongarch headers (*)
  701363d... Fortran: Set hidden string length for pointer components [P (*)
  530babc... rs6000: Make 32 bit stack_protect support prefixed insn [PR (*)
  610b845... testsuite: Avoid uninit var in pr60510.f [PR111427] (*)
  f1a05dc... vect: Consider vec_perm costing for VMAT_CONTIGUOUS_REVERSE (*)
  0bdb9bb... vect: Get rid of vect_model_store_cost (*)
  0a96eed... vect: Adjust vectorizable_store costing on VMAT_CONTIGUOUS_ (*)
  6a88202... vect: Adjust vectorizable_store costing on VMAT_LOAD_STORE_ (*)
  8b151eb... vect: Adjust vectorizable_store costing on VMAT_ELEMENTWISE (*)
  7184d22... vect: Simplify costing on vectorizable_scan_store (*)
  e00820c... vect: Adjust vectorizable_store costing on VMAT_GATHER_SCAT (*)
  3bf2366... vect: Move vect_model_store_cost next to the transform in v (*)
  32207b1... vect: Ensure vect store is supported for some VMAT_ELEMENTW (*)
  e1e127d... x86: set spincount 1 for x86 hybrid platform (*)
  6a3302a... RISC-V: Support FP llrint auto vectorization (*)
  180b08f... [APX] Support Intel APX PUSH2POP2 (*)
  d6b7fe1... RISC-V: Support FP irintf auto vectorization (*)
  6febf76... Daily bump. (*)
  06f36c1... RISC-V: Add TARGET_MIN_VLEN_OPTS to fix the build (*)
  a3e50ee... RISC-V Adjust long unconditional branch sequence (*)
  faae30c... RISC-V: Extend riscv_subset_list, preparatory for target at (*)
  9452d13... RISC-V: Refactor riscv_option_override and riscv_convert_ve (*)
  0363bba... options: Define TARGET_<NAME>_P and TARGET_<NAME>_OPTS_P ma (*)
  e8d418d... MATCH: [PR111282] Simplify `a & (b ^ ~a)` to `a & b` (*)
  acfca27... modula2: Narrow subranges to int or unsigned int if ZTYPE i (*)
  5ef248c... [PATCH v4 2/2] RISC-V: Add support for XCValu extension in  (*)
  400efdd... [PATCH v4 1/2] RISC-V: Add support for XCVmac extension in  (*)
  70b02df... MAINTAINERS: Fix write after approval name order (*)
  2b783fe... PR modula2/111675 Incorrect packed record field value passe (*)
  f6c5e24... RISC-V: Fix incorrect index(offset) of gather/scatter (*)
  d1e5566... RISC-V: Support FP lrint/lrintf auto vectorization (*)
  d4de593... RISC-V: Remove XFAIL of ssa-dom-cse-2.c (*)
  e75bf19... tree-ssa-strlen: optimization skips clobbering store [PR111 (*)
  c414924... Optimize (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) as (and:SI (*)
  23aabde... RISC-V: Enable full coverage vect tests (*)
  4efe908... Refine predicate of operands[2] in divv4hf3 with register_o (*)
  de04f73... RISC-V Regression: Make pattern match more accurate of vect (*)
  cfe8994... RISC-V Regression: Fix FAIL of vect-multitypes-16.c for RVV (*)
  69e3072... Daily bump. (*)
  71f9064... RISC-V: far-branch: Handle far jumps and branches for funct (*)
  bd5719b... c++: mangle multiple levels of template parms [PR109422] (*)
  975da6f... MATCH: [PR111679] Add alternative simplification of `a | (( (*)
  5bb6a87... RISC-V Regression: Make match patterns more accurate (*)
  0b0fcb2... RISC-V Regression: Fix FAIL of predcom-2.c (*)
  8a36140... RISC-V Regression: Fix FAIL of pr65947-8.c for RVV (*)
  ddf17b6... MAINTAINERS: Add myself to write after approval (*)
  5255273... RISC-V: Add VLS BOOL mode vcond_mask[PR111751] (*)
  70b5c69... tree-optimization/111751 - support 1024 bit vector constant (*)
  2f15083... ada: Fix internal error on too large representation clause  (*)
  42c46cf... ada: Tweak internal subprogram in Ada.Directories (*)
  25c253e... ada: Remove superfluous setter procedure (*)
  e05e5d6... ada: Fix bad finalization of limited aggregate in condition (*)
  6bd83c9... ada: Fix infinite loop with multiple limited with clauses (*)
  34992e1... ada: Fix filesystem entry filtering (*)
  f71c631... ada: Tweak documentation comments (*)
  85a0ce9... ada: Crash processing pragmas Compile_Time_Error and Compil (*)
  a704603... RISC-V: Add testcase for SCCVN optimization[PR111751] (*)
  7c76c87... Fix missed CSE with a BLKmode entity (*)
  4d23049... RISC-V Regression: Fix FAIL of bb-slp-pr65935.c for RVV (*)
  aaa5a53... arc: Refurbish add.f combiner patterns (*)
  4ecb9b0... RISC-V: Add available vector size for RVV (*)
  fb124f2... Daily bump. (*)
  cc50337... Fixes for profile count/probability maintenance (*)
  08d0f84... analyzer: fix build with gcc < 6 (*)
  b0892b1... Ensure float equivalences include + and - zero. (*)
  5ee5111... Remove unused get_identity_relation. (*)
  dae2144... RISC-V Regression test: Fix slp-perm-4.c FAIL for RVV (*)
  e90eddd... RISC-V Regression tests: Fix FAIL of pr97832* for RVV (*)
  30b76f8... RISC-V Regression test: Fix FAIL of slp-12a.c (*)
  db20b83... RISC-V Regression test: Fix FAIL of slp-reduc-4.c for RVV (*)
  79e6ea4... RISC-V Regression test: Adapt SLP tests like ARM SVE (*)
  f849843... RISC-V: Add initial pipeline description for an out-of-orde (*)
  dee55cf... RISC-V: Support movmisalign of RVV VLA modes (*)
  578aa2f... THead: Fix missing CFI directives for th.sdd in prologue. (*)
  11b8cf1... tree-optimization/111715 - improve TBAA for access paths wi (*)
  841668a... RISC-V: Refine bswap16 auto vectorization code gen (*)
  1543f3e... RISC-V Regression test: Fix FAIL of pr45752.c for RVV (*)
  3f99b70... testsuite: Fix vect_cond_arith_* dump checks for RVV. (*)
  784deda... RISC-V Regression test: Fix FAIL of fast-math-slp-38.c for  (*)
  34d4168... i386: Implement doubleword right shifts by 1 bit using s[ha (*)
  85bd47b... Allow -mno-evex512 usage (*)
  43b08ab... Support -mevex512 for AVX512FP16 intrins (*)
  b549005... Support -mevex512 for AVX512{IFMA,VBMI,VNNI,BF16,VPOPCNTDQ, (*)
  8e79b1b... Support -mevex512 for AVX512BW intrins (*)
  1b24890... Support -mevex512 for AVX512DQ intrins (*)
  c1eef66... Support -mevex512 for AVX512F intrins (*)
  aa9bce3... Disable zmm register and 512 bit libmvec call when !TARGET_ (*)
  c2a282a... [PATCH 5/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builti (*)
  b74e292... [PATCH 4/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builti (*)
  031e033... [PATCH 3/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builti (*)
  cb8c718... [PATCH 2/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builti (*)
  8d4b3b3... [PATCH 1/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builti (*)
  aea8e41... [PATCH 5/5] Push evex512 target for 512 bit intrins (*)
  8108b22... [PATCH 4/5] Push evex512 target for 512 bit intrins (*)
  03a8504... [PATCH 4/5] Push evex512 target for 512 bit intrins (*)
  ba8e3f3... [PATCH 2/5] Push evex512 target for 512 bit intrins (*)
  79fb476... [PATCH 1/5] Push evex512 target for 512 bit intrins (*)
  6882df7... Initial support for -mevex512 (*)
  873586e... TEST: Fix dump FAIL for RVV (RISCV-V vector) (*)
  c1e4747... rs6000: support 32bit inline lrint (*)
  5cbe235... rs6000: enable SImode in FP register on P7 (*)
  6f28992... s390: Make use of new copysign RTL (*)
  86d92c8... [i386] APX EGPR: fix missing patterns that prohibit egpr (*)
  00c67d6... Daily bump. (*)
  0a0ceb7... libcpp: eliminate LINEMAPS_{ORDINARY,MACRO}_MAPS (*)
  45bae18... libcpp: eliminate LINEMAPS_{,ORDINARY_,MACRO_}CACHE (*)
  a73c80d... libcpp: eliminate LINEMAPS_LAST_ALLOCATED{,_ORDINARY,_MACRO (*)
  b365e9d... analyzer: improvements to out-of-bounds diagrams [PR111155] (*)
  1f68a3e... libcpp: eliminate COMBINE_LOCATION_DATA (*)
  25af7c1... libcpp: "const" and other cleanups (*)
  94caa6a... diagnostics: fix ICE on sarif output when source file is un (*)
  b4fc1ab... Support signbit/xorsign/copysign/abs/neg/and/xor/ior/andn f (*)
  91fdbd6... Support smin/smax for V2HF/V4HF (*)
  6a8edd5... Fortran/OpenMP: Fix handling of strictly structured blocks (*)

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2023-11-20 21:52 [gcc/microsoft/heads/main] (1138 commits) Merge commit 'e85c596ae2d1e5f5b769b5af4c0a8e7d055e40d7' int Eugene Rozenfeld

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