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* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Provide FP conditional-branch instructions for if-conversion
@ 2023-11-22 5:11 Jeff Law
0 siblings, 0 replies; only message in thread
From: Jeff Law @ 2023-11-22 5:11 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:10c8fa1a7943feafc7a3bef78b039dd7cea7a250
commit 10c8fa1a7943feafc7a3bef78b039dd7cea7a250
Author: Maciej W. Rozycki <macro@embecosm.com>
Date: Wed Nov 22 01:18:30 2023 +0000
RISC-V: Provide FP conditional-branch instructions for if-conversion
Do not expand floating-point conditional-branch RTL instructions right
away that use a comparison operation that is either directly available
as a machine conditional-set instruction or is NE, which can be emulated
by EQ. This is so that if-conversion sees them in their original form
and can produce fewer operations tried in a branchless code sequence
compared to when such an instruction has been already converted to a
sequence of a floating-point conditional-set RTL instruction followed by
an integer conditional-branch RTL instruction. Split any floating-point
conditional-branch RTL instructions still remaining after reload then.
Adjust the testsuite accordingly: since the middle end uses the inverse
condition internally, an inverse conditional-set instruction may make it
to assembly output and also `cond_move_process_if_block' will be used by
if-conversion rather than `noce_process_if_block', because the latter
function not yet been updated to handle inverted conditions.
gcc/
* config/riscv/predicates.md (ne_operator): New predicate.
* config/riscv/riscv.cc (riscv_insn_cost): Handle branches on a
floating-point condition.
* config/riscv/riscv.md (@cbranch<mode>4): Rename expander to...
(@cbranch<ANYF:mode>4): ... this. Only expand the RTX via
`riscv_expand_conditional_branch' for `!signed_order_operator'
operators, otherwise let it through.
(*cbranch<ANYF:mode>4, *cbranch<ANYF:mode>4): New insns and
splitters.
gcc/testsuite/
* gcc.target/riscv/movdifge-sfb.c: Reject "if-conversion
succeeded through" rather than accepting it.
* gcc.target/riscv/movdifge-thead.c: Likewise.
* gcc.target/riscv/movdifge-ventana.c: Likewise.
* gcc.target/riscv/movdifge-zicond.c: Likewise.
* gcc.target/riscv/movdifgt-sfb.c: Likewise.
* gcc.target/riscv/movdifgt-thead.c: Likewise.
* gcc.target/riscv/movdifgt-ventana.c: Likewise.
* gcc.target/riscv/movdifgt-zicond.c: Likewise.
* gcc.target/riscv/movdifle-sfb.c: Likewise.
* gcc.target/riscv/movdifle-thead.c: Likewise.
* gcc.target/riscv/movdifle-ventana.c: Likewise.
* gcc.target/riscv/movdifle-zicond.c: Likewise.
* gcc.target/riscv/movdiflt-sfb.c: Likewise.
* gcc.target/riscv/movdiflt-thead.c: Likewise.
* gcc.target/riscv/movdiflt-ventana.c: Likewise.
* gcc.target/riscv/movdiflt-zicond.c: Likewise.
* gcc.target/riscv/movsifge-sfb.c: Likewise.
* gcc.target/riscv/movsifge-thead.c: Likewise.
* gcc.target/riscv/movsifge-ventana.c: Likewise.
* gcc.target/riscv/movsifge-zicond.c: Likewise.
* gcc.target/riscv/movsifgt-sfb.c: Likewise.
* gcc.target/riscv/movsifgt-thead.c: Likewise.
* gcc.target/riscv/movsifgt-ventana.c: Likewise.
* gcc.target/riscv/movsifgt-zicond.c: Likewise.
* gcc.target/riscv/movsifle-sfb.c: Likewise.
* gcc.target/riscv/movsifle-thead.c: Likewise.
* gcc.target/riscv/movsifle-ventana.c: Likewise.
* gcc.target/riscv/movsifle-zicond.c: Likewise.
* gcc.target/riscv/movsiflt-sfb.c: Likewise.
* gcc.target/riscv/movsiflt-thead.c: Likewise.
* gcc.target/riscv/movsiflt-ventana.c: Likewise.
* gcc.target/riscv/movsiflt-zicond.c: Likewise.
* gcc.target/riscv/smax-ieee.c: Also accept FLT.D.
* gcc.target/riscv/smaxf-ieee.c: Also accept FLT.S.
* gcc.target/riscv/smin-ieee.c: Also accept FGT.D.
* gcc.target/riscv/sminf-ieee.c: Also accept FGT.S.
(cherry picked from commit 2f825475b2a64fce716a2628bdc631491dd3a1e1)
Diff:
---
gcc/config/riscv/predicates.md | 3 +
gcc/config/riscv/riscv.cc | 22 ++++--
gcc/config/riscv/riscv.md | 89 ++++++++++++++++++++---
gcc/testsuite/gcc.target/riscv/movdifge-sfb.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdifge-thead.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdifge-ventana.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdifge-zicond.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdifgt-sfb.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdifgt-thead.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdifgt-ventana.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdifgt-zicond.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdifle-sfb.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdifle-thead.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdifle-ventana.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdifle-zicond.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdiflt-sfb.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdiflt-thead.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdiflt-ventana.c | 2 +-
gcc/testsuite/gcc.target/riscv/movdiflt-zicond.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsifge-sfb.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsifge-thead.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsifge-ventana.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsifge-zicond.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsifgt-sfb.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsifgt-thead.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsifgt-ventana.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsifgt-zicond.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsifle-sfb.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsifle-thead.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsifle-ventana.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsifle-zicond.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsiflt-sfb.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsiflt-thead.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsiflt-ventana.c | 2 +-
gcc/testsuite/gcc.target/riscv/movsiflt-zicond.c | 2 +-
gcc/testsuite/gcc.target/riscv/smax-ieee.c | 2 +-
gcc/testsuite/gcc.target/riscv/smaxf-ieee.c | 2 +-
gcc/testsuite/gcc.target/riscv/smin-ieee.c | 2 +-
gcc/testsuite/gcc.target/riscv/sminf-ieee.c | 2 +-
39 files changed, 134 insertions(+), 52 deletions(-)
diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index f943f31f4db..271c07ab0cf 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -333,6 +333,9 @@
(define_predicate "modular_operator"
(match_code "plus,minus,mult,ashift"))
+(define_predicate "ne_operator"
+ (match_code "ne"))
+
(define_predicate "equality_operator"
(match_code "eq,ne"))
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index ef6569ed15f..998984cfbe6 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3337,7 +3337,9 @@ riscv_address_cost (rtx addr, machine_mode mode,
calculation for conditional branches: one unit is considered the cost
of microarchitecture-dependent actual branch execution and therefore
multiplied by BRANCH_COST and any remaining units are considered fixed
- branch overhead. */
+ branch overhead. Branches on a floating-point condition incur an extra
+ instruction cost as they will be split into an FCMP operation followed
+ by a branch on an integer condition. */
static int
riscv_insn_cost (rtx_insn *insn, bool speed)
@@ -3345,11 +3347,19 @@ riscv_insn_cost (rtx_insn *insn, bool speed)
rtx x = PATTERN (insn);
int cost = pattern_cost (x, speed);
- if (JUMP_P (insn)
- && GET_CODE (x) == SET
- && GET_CODE (SET_DEST (x)) == PC
- && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
- cost += COSTS_N_INSNS (BRANCH_COST (speed, false) - 1);
+ if (JUMP_P (insn))
+ {
+ if (GET_CODE (x) == PARALLEL)
+ x = XVECEXP (x, 0, 0);
+ if (GET_CODE (x) == SET
+ && GET_CODE (SET_DEST (x)) == PC
+ && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
+ {
+ cost += COSTS_N_INSNS (BRANCH_COST (speed, false) - 1);
+ if (FLOAT_MODE_P (GET_MODE (XEXP (XEXP (SET_SRC (x), 0), 0))))
+ cost += COSTS_N_INSNS (1);
+ }
+ }
return cost;
}
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 86f89da8a42..c4db7a7aa74 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -2750,20 +2750,89 @@
DONE;
})
-(define_expand "@cbranch<mode>4"
- [(set (pc)
- (if_then_else (match_operator 0 "fp_branch_comparison"
- [(match_operand:ANYF 1 "register_operand")
- (match_operand:ANYF 2 "register_operand")])
- (label_ref (match_operand 3 ""))
- (pc)))]
+(define_expand "@cbranch<ANYF:mode>4"
+ [(parallel [(set (pc)
+ (if_then_else (match_operator 0 "fp_branch_comparison"
+ [(match_operand:ANYF 1 "register_operand")
+ (match_operand:ANYF 2 "register_operand")])
+ (label_ref (match_operand 3 ""))
+ (pc)))
+ (clobber (match_operand 4 ""))])]
"TARGET_HARD_FLOAT || TARGET_ZFINX"
{
- riscv_expand_conditional_branch (operands[3], GET_CODE (operands[0]),
- operands[1], operands[2]);
- DONE;
+ if (!signed_order_operator (operands[0], GET_MODE (operands[0])))
+ {
+ riscv_expand_conditional_branch (operands[3], GET_CODE (operands[0]),
+ operands[1], operands[2]);
+ DONE;
+ }
+ operands[4] = gen_reg_rtx (TARGET_64BIT ? DImode : SImode);
})
+(define_insn_and_split "*cbranch<ANYF:mode>4"
+ [(set (pc)
+ (if_then_else (match_operator 1 "fp_native_comparison"
+ [(match_operand:ANYF 2 "register_operand" "f")
+ (match_operand:ANYF 3 "register_operand" "f")])
+ (label_ref (match_operand 0 ""))
+ (pc)))
+ (clobber (match_operand:X 4 "register_operand" "=r"))]
+ "TARGET_HARD_FLOAT || TARGET_ZFINX"
+ "#"
+ "&& reload_completed"
+ [(set (match_dup 4)
+ (match_op_dup:X 1 [(match_dup 2) (match_dup 3)]))
+ (set (pc)
+ (if_then_else (ne:X (match_dup 4) (const_int 0))
+ (label_ref (match_operand 0))
+ (pc)))]
+ ""
+ [(set_attr "type" "branch")
+ (set (attr "length")
+ (if_then_else (and (le (minus (match_dup 0) (pc))
+ (const_int 4084))
+ (le (minus (pc) (match_dup 0))
+ (const_int 4096)))
+ (const_int 8)
+ (if_then_else (and (le (minus (match_dup 0) (pc))
+ (const_int 1048564))
+ (le (minus (pc) (match_dup 0))
+ (const_int 1048576)))
+ (const_int 12)
+ (const_int 16))))])
+
+(define_insn_and_split "*cbranch<ANYF:mode>4"
+ [(set (pc)
+ (if_then_else (match_operator 1 "ne_operator"
+ [(match_operand:ANYF 2 "register_operand" "f")
+ (match_operand:ANYF 3 "register_operand" "f")])
+ (label_ref (match_operand 0 ""))
+ (pc)))
+ (clobber (match_operand:X 4 "register_operand" "=r"))]
+ "TARGET_HARD_FLOAT || TARGET_ZFINX"
+ "#"
+ "&& reload_completed"
+ [(set (match_dup 4)
+ (eq:X (match_dup 2) (match_dup 3)))
+ (set (pc)
+ (if_then_else (eq:X (match_dup 4) (const_int 0))
+ (label_ref (match_operand 0))
+ (pc)))]
+ ""
+ [(set_attr "type" "branch")
+ (set (attr "length")
+ (if_then_else (and (le (minus (match_dup 0) (pc))
+ (const_int 4084))
+ (le (minus (pc) (match_dup 0))
+ (const_int 4096)))
+ (const_int 8)
+ (if_then_else (and (le (minus (match_dup 0) (pc))
+ (const_int 1048564))
+ (le (minus (pc) (match_dup 0))
+ (const_int 1048576)))
+ (const_int 12)
+ (const_int 16))))])
+
(define_insn_and_split "*branch_on_bit<X:mode>"
[(set (pc)
(if_then_else
diff --git a/gcc/testsuite/gcc.target/riscv/movdifge-sfb.c b/gcc/testsuite/gcc.target/riscv/movdifge-sfb.c
index 1d1f9549a68..b5eb0f40dff 100644
--- a/gcc/testsuite/gcc.target/riscv/movdifge-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifge-sfb.c
@@ -20,7 +20,7 @@ movdifge (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdifge-thead.c b/gcc/testsuite/gcc.target/riscv/movdifge-thead.c
index 116e75bd8d6..6fb210ccc8d 100644
--- a/gcc/testsuite/gcc.target/riscv/movdifge-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifge-thead.c
@@ -18,7 +18,7 @@ movdifge (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdifge-ventana.c b/gcc/testsuite/gcc.target/riscv/movdifge-ventana.c
index 18c924cc2d3..be33171d109 100644
--- a/gcc/testsuite/gcc.target/riscv/movdifge-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifge-ventana.c
@@ -20,7 +20,7 @@ movdifge (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdifge-zicond.c b/gcc/testsuite/gcc.target/riscv/movdifge-zicond.c
index ccb9f385db7..0c6a10fee28 100644
--- a/gcc/testsuite/gcc.target/riscv/movdifge-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifge-zicond.c
@@ -20,7 +20,7 @@ movdifge (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdifgt-sfb.c b/gcc/testsuite/gcc.target/riscv/movdifgt-sfb.c
index a5edace43a9..0fc5a1caa62 100644
--- a/gcc/testsuite/gcc.target/riscv/movdifgt-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifgt-sfb.c
@@ -20,7 +20,7 @@ movdifgt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdifgt-thead.c b/gcc/testsuite/gcc.target/riscv/movdifgt-thead.c
index 904ce054c7b..1eece07afcd 100644
--- a/gcc/testsuite/gcc.target/riscv/movdifgt-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifgt-thead.c
@@ -18,7 +18,7 @@ movdifgt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdifgt-ventana.c b/gcc/testsuite/gcc.target/riscv/movdifgt-ventana.c
index cffbd3e60ca..7df01a64952 100644
--- a/gcc/testsuite/gcc.target/riscv/movdifgt-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifgt-ventana.c
@@ -20,7 +20,7 @@ movdifgt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdifgt-zicond.c b/gcc/testsuite/gcc.target/riscv/movdifgt-zicond.c
index 453b948fc15..6b18e8f4678 100644
--- a/gcc/testsuite/gcc.target/riscv/movdifgt-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifgt-zicond.c
@@ -20,7 +20,7 @@ movdifgt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdifle-sfb.c b/gcc/testsuite/gcc.target/riscv/movdifle-sfb.c
index e22fce105ba..475c7f2d25a 100644
--- a/gcc/testsuite/gcc.target/riscv/movdifle-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifle-sfb.c
@@ -20,7 +20,7 @@ movdifle (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdifle-thead.c b/gcc/testsuite/gcc.target/riscv/movdifle-thead.c
index 05d39d6cc3d..9ee0dbb7da4 100644
--- a/gcc/testsuite/gcc.target/riscv/movdifle-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifle-thead.c
@@ -18,7 +18,7 @@ movdifle (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdifle-ventana.c b/gcc/testsuite/gcc.target/riscv/movdifle-ventana.c
index 677e679d194..d6f67ae940d 100644
--- a/gcc/testsuite/gcc.target/riscv/movdifle-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifle-ventana.c
@@ -20,7 +20,7 @@ movdifle (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdifle-zicond.c b/gcc/testsuite/gcc.target/riscv/movdifle-zicond.c
index 27091353349..c1f13b7f5dc 100644
--- a/gcc/testsuite/gcc.target/riscv/movdifle-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movdifle-zicond.c
@@ -20,7 +20,7 @@ movdifle (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdiflt-sfb.c b/gcc/testsuite/gcc.target/riscv/movdiflt-sfb.c
index 0f07997be0e..c116fe315b4 100644
--- a/gcc/testsuite/gcc.target/riscv/movdiflt-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movdiflt-sfb.c
@@ -20,7 +20,7 @@ movdiflt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdiflt-thead.c b/gcc/testsuite/gcc.target/riscv/movdiflt-thead.c
index 9c5df857fba..f4f210c02a9 100644
--- a/gcc/testsuite/gcc.target/riscv/movdiflt-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movdiflt-thead.c
@@ -18,7 +18,7 @@ movdiflt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdiflt-ventana.c b/gcc/testsuite/gcc.target/riscv/movdiflt-ventana.c
index af882b905ea..049b77c2b8b 100644
--- a/gcc/testsuite/gcc.target/riscv/movdiflt-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movdiflt-ventana.c
@@ -20,7 +20,7 @@ movdiflt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movdiflt-zicond.c b/gcc/testsuite/gcc.target/riscv/movdiflt-zicond.c
index 64a4cf15255..6a1d7cea19f 100644
--- a/gcc/testsuite/gcc.target/riscv/movdiflt-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movdiflt-zicond.c
@@ -20,7 +20,7 @@ movdiflt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsifge-sfb.c b/gcc/testsuite/gcc.target/riscv/movsifge-sfb.c
index 31eae9176b6..c9f0e2dfa50 100644
--- a/gcc/testsuite/gcc.target/riscv/movsifge-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifge-sfb.c
@@ -20,7 +20,7 @@ movsifge (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsifge-thead.c b/gcc/testsuite/gcc.target/riscv/movsifge-thead.c
index 1fb542ed1e2..893a522ac5f 100644
--- a/gcc/testsuite/gcc.target/riscv/movsifge-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifge-thead.c
@@ -18,7 +18,7 @@ movsifge (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:beq|bne)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsifge-ventana.c b/gcc/testsuite/gcc.target/riscv/movsifge-ventana.c
index 3d2ba7122b7..26e55b6d867 100644
--- a/gcc/testsuite/gcc.target/riscv/movsifge-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifge-ventana.c
@@ -20,7 +20,7 @@ movsifge (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsifge-zicond.c b/gcc/testsuite/gcc.target/riscv/movsifge-zicond.c
index 1a6f52f8360..e38aa80bf0d 100644
--- a/gcc/testsuite/gcc.target/riscv/movsifge-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifge-zicond.c
@@ -20,7 +20,7 @@ movsifge (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsifgt-sfb.c b/gcc/testsuite/gcc.target/riscv/movsifgt-sfb.c
index f13f6aecd72..47ea2c2149d 100644
--- a/gcc/testsuite/gcc.target/riscv/movsifgt-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifgt-sfb.c
@@ -20,7 +20,7 @@ movsifgt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsifgt-thead.c b/gcc/testsuite/gcc.target/riscv/movsifgt-thead.c
index ca77e80b525..0ec4e575f87 100644
--- a/gcc/testsuite/gcc.target/riscv/movsifgt-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifgt-thead.c
@@ -18,7 +18,7 @@ movsifgt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:beq|bne)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsifgt-ventana.c b/gcc/testsuite/gcc.target/riscv/movsifgt-ventana.c
index 4dae496a405..8896266e243 100644
--- a/gcc/testsuite/gcc.target/riscv/movsifgt-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifgt-ventana.c
@@ -20,7 +20,7 @@ movsifgt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsifgt-zicond.c b/gcc/testsuite/gcc.target/riscv/movsifgt-zicond.c
index 87eaa98488f..bada72f44d8 100644
--- a/gcc/testsuite/gcc.target/riscv/movsifgt-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifgt-zicond.c
@@ -20,7 +20,7 @@ movsifgt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsifle-sfb.c b/gcc/testsuite/gcc.target/riscv/movsifle-sfb.c
index a636a9169a9..7cb9167cd13 100644
--- a/gcc/testsuite/gcc.target/riscv/movsifle-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifle-sfb.c
@@ -20,7 +20,7 @@ movsifle (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsifle-thead.c b/gcc/testsuite/gcc.target/riscv/movsifle-thead.c
index 67c5822a5f4..b05a02a44f9 100644
--- a/gcc/testsuite/gcc.target/riscv/movsifle-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifle-thead.c
@@ -18,7 +18,7 @@ movsifle (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:beq|bne)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsifle-ventana.c b/gcc/testsuite/gcc.target/riscv/movsifle-ventana.c
index 14d5298af23..24b49d9dffc 100644
--- a/gcc/testsuite/gcc.target/riscv/movsifle-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifle-ventana.c
@@ -20,7 +20,7 @@ movsifle (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsifle-zicond.c b/gcc/testsuite/gcc.target/riscv/movsifle-zicond.c
index f5e9e90de91..5aad91007ea 100644
--- a/gcc/testsuite/gcc.target/riscv/movsifle-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movsifle-zicond.c
@@ -20,7 +20,7 @@ movsifle (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fge\\.d|fle\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsiflt-sfb.c b/gcc/testsuite/gcc.target/riscv/movsiflt-sfb.c
index 7c1f8e08c9a..110e38a49e6 100644
--- a/gcc/testsuite/gcc.target/riscv/movsiflt-sfb.c
+++ b/gcc/testsuite/gcc.target/riscv/movsiflt-sfb.c
@@ -20,7 +20,7 @@ movsiflt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:beq|bne)\\s\[^\\s\]+\\s# movcc\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:seqz|snez)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsiflt-thead.c b/gcc/testsuite/gcc.target/riscv/movsiflt-thead.c
index f63cb25b4c4..124c408718b 100644
--- a/gcc/testsuite/gcc.target/riscv/movsiflt-thead.c
+++ b/gcc/testsuite/gcc.target/riscv/movsiflt-thead.c
@@ -18,7 +18,7 @@ movsiflt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\s(?:th\\.mveqz|th\\.mvnez)\\s" 1 } } */
/* { dg-final { scan-assembler-not "\\s(?:beq|bne)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsiflt-ventana.c b/gcc/testsuite/gcc.target/riscv/movsiflt-ventana.c
index c0b88869633..911a5029dda 100644
--- a/gcc/testsuite/gcc.target/riscv/movsiflt-ventana.c
+++ b/gcc/testsuite/gcc.target/riscv/movsiflt-ventana.c
@@ -20,7 +20,7 @@ movsiflt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskc\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\svt\\.maskcn\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/movsiflt-zicond.c b/gcc/testsuite/gcc.target/riscv/movsiflt-zicond.c
index d2e2550ad1f..7db2b994fc5 100644
--- a/gcc/testsuite/gcc.target/riscv/movsiflt-zicond.c
+++ b/gcc/testsuite/gcc.target/riscv/movsiflt-zicond.c
@@ -20,7 +20,7 @@ movsiflt (double w, double x, int_t y, int_t z)
*/
/* { dg-final { scan-rtl-dump-times "Conversion succeeded on pass 1\\." 1 "ce1" } } */
-/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_try_cmove" 1 "ce1" } } */
+/* { dg-final { scan-rtl-dump-not "if-conversion succeeded through" "ce1" } } */
/* { dg-final { scan-assembler-times "\\s(?:fgt\\.d|flt\\.d)\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 1 } } */
/* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/smax-ieee.c b/gcc/testsuite/gcc.target/riscv/smax-ieee.c
index 2dbccefe2f4..775e515cf38 100644
--- a/gcc/testsuite/gcc.target/riscv/smax-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/smax-ieee.c
@@ -10,4 +10,4 @@ smax (double x, double y)
/* { dg-final { scan-assembler-not "\t(call|tail)\tfmax\t" } } */
/* { dg-final { scan-assembler-not "\tfmax\\.d\t" } } */
-/* { dg-final { scan-assembler "\tfge\\.d\t" } } */
+/* { dg-final { scan-assembler "\t(fge\\.d|flt\\.d)\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/smaxf-ieee.c b/gcc/testsuite/gcc.target/riscv/smaxf-ieee.c
index 31b9bfa4d91..c794bc3b02f 100644
--- a/gcc/testsuite/gcc.target/riscv/smaxf-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/smaxf-ieee.c
@@ -10,4 +10,4 @@ smaxf (float x, float y)
/* { dg-final { scan-assembler-not "\t(call|tail)\tfmaxf\t" } } */
/* { dg-final { scan-assembler-not "\tfmax\\.s\t" } } */
-/* { dg-final { scan-assembler "\tfge\\.s\t" } } */
+/* { dg-final { scan-assembler "\t(fge\\.s|flt\\.s)\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/smin-ieee.c b/gcc/testsuite/gcc.target/riscv/smin-ieee.c
index ea36c2de89f..28cedd3bea5 100644
--- a/gcc/testsuite/gcc.target/riscv/smin-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/smin-ieee.c
@@ -10,4 +10,4 @@ smin (double x, double y)
/* { dg-final { scan-assembler-not "\t(call|tail)\tfmin\t" } } */
/* { dg-final { scan-assembler-not "\tfmin\\.d\t" } } */
-/* { dg-final { scan-assembler "\tfle\\.d\t" } } */
+/* { dg-final { scan-assembler "\t(fgt\\.d|fle\\.d)\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sminf-ieee.c b/gcc/testsuite/gcc.target/riscv/sminf-ieee.c
index 427617af08f..18d485865e1 100644
--- a/gcc/testsuite/gcc.target/riscv/sminf-ieee.c
+++ b/gcc/testsuite/gcc.target/riscv/sminf-ieee.c
@@ -10,4 +10,4 @@ sminf (float x, float y)
/* { dg-final { scan-assembler-not "\t(call|tail)\tfminf\t" } } */
/* { dg-final { scan-assembler-not "\tfmin\\.s\t" } } */
-/* { dg-final { scan-assembler "\tfle\\.s\t" } } */
+/* { dg-final { scan-assembler "\t(fgt\\.s|fle\\.s)\t" } } */
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2023-11-22 5:11 [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Provide FP conditional-branch instructions for if-conversion Jeff Law
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