public inbox for gcc-cvs@sourceware.org
help / color / mirror / Atom feed
* [gcc r14-5874] s390: Fixup builtins vec_rli and verll
@ 2023-11-27 11:53 Stefan Schulze Frielinghaus
0 siblings, 0 replies; only message in thread
From: Stefan Schulze Frielinghaus @ 2023-11-27 11:53 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:d1818e2f16ba8f011d9b3e5813d5040e6523955f
commit r14-5874-gd1818e2f16ba8f011d9b3e5813d5040e6523955f
Author: Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
Date: Mon Nov 27 12:51:39 2023 +0100
s390: Fixup builtins vec_rli and verll
Commit 248df13b966f46649e16dc3c8c92b263790ef503 restricted the rotate
count to immediates. Although the documentation of vec_rli (Vector
Element Rotate Left Immediate) can be read as if it where restricted to
immediates, this is not the case. Thus, revert this commit.
In order to finally allow register operands, the rotate count must be of
type unsigned char since the expander expects it to be of mode QI. The
previously used type unsigned integer worked out for immediates since
those are of VOID mode anyway.
gcc/ChangeLog:
* config/s390/s390-builtin-types.def: Remove types.
* config/s390/s390-builtins.def (O_U64): Remove 64-bit literal support.
Don't restrict s390_vec_rli and s390_verll[bhfg] to immediates.
* config/s390/s390.cc (s390_const_operand_ok): Remove 64-bit
literal support.
Diff:
---
gcc/config/s390/s390-builtin-types.def | 4 ---
gcc/config/s390/s390-builtins.def | 60 ++++++++++++++--------------------
gcc/config/s390/s390.cc | 6 ++--
3 files changed, 27 insertions(+), 43 deletions(-)
diff --git a/gcc/config/s390/s390-builtin-types.def b/gcc/config/s390/s390-builtin-types.def
index 6799b883e29..6d2a3f912b8 100644
--- a/gcc/config/s390/s390-builtin-types.def
+++ b/gcc/config/s390/s390-builtin-types.def
@@ -216,7 +216,6 @@ DEF_FN_TYPE_2 (BT_FN_UV16QI_UCHAR_INT, BT_UV16QI, BT_UCHAR, BT_INT)
DEF_FN_TYPE_2 (BT_FN_UV16QI_UCHAR_UCHAR, BT_UV16QI, BT_UCHAR, BT_UCHAR)
DEF_FN_TYPE_2 (BT_FN_UV16QI_UV16QI_INTPTR, BT_UV16QI, BT_UV16QI, BT_INTPTR)
DEF_FN_TYPE_2 (BT_FN_UV16QI_UV16QI_UCHAR, BT_UV16QI, BT_UV16QI, BT_UCHAR)
-DEF_FN_TYPE_2 (BT_FN_UV16QI_UV16QI_UINT, BT_UV16QI, BT_UV16QI, BT_UINT)
DEF_FN_TYPE_2 (BT_FN_UV16QI_UV16QI_UV16QI, BT_UV16QI, BT_UV16QI, BT_UV16QI)
DEF_FN_TYPE_2 (BT_FN_UV16QI_UV2DI_UV2DI, BT_UV16QI, BT_UV2DI, BT_UV2DI)
DEF_FN_TYPE_2 (BT_FN_UV16QI_UV4SI_UV4SI, BT_UV16QI, BT_UV4SI, BT_UV4SI)
@@ -225,7 +224,6 @@ DEF_FN_TYPE_2 (BT_FN_UV2DI_UCHAR_UCHAR, BT_UV2DI, BT_UCHAR, BT_UCHAR)
DEF_FN_TYPE_2 (BT_FN_UV2DI_ULONGLONG_INT, BT_UV2DI, BT_ULONGLONG, BT_INT)
DEF_FN_TYPE_2 (BT_FN_UV2DI_UV16QI_UV16QI, BT_UV2DI, BT_UV16QI, BT_UV16QI)
DEF_FN_TYPE_2 (BT_FN_UV2DI_UV2DI_UCHAR, BT_UV2DI, BT_UV2DI, BT_UCHAR)
-DEF_FN_TYPE_2 (BT_FN_UV2DI_UV2DI_UINT, BT_UV2DI, BT_UV2DI, BT_UINT)
DEF_FN_TYPE_2 (BT_FN_UV2DI_UV2DI_UV2DI, BT_UV2DI, BT_UV2DI, BT_UV2DI)
DEF_FN_TYPE_2 (BT_FN_UV2DI_UV4SI_UV4SI, BT_UV2DI, BT_UV4SI, BT_UV4SI)
DEF_FN_TYPE_2 (BT_FN_UV2DI_UV8HI_UV8HI, BT_UV2DI, BT_UV8HI, BT_UV8HI)
@@ -236,7 +234,6 @@ DEF_FN_TYPE_2 (BT_FN_UV4SI_UV16QI_UV16QI, BT_UV4SI, BT_UV16QI, BT_UV16QI)
DEF_FN_TYPE_2 (BT_FN_UV4SI_UV2DI_UV2DI, BT_UV4SI, BT_UV2DI, BT_UV2DI)
DEF_FN_TYPE_2 (BT_FN_UV4SI_UV4SI_INTPTR, BT_UV4SI, BT_UV4SI, BT_INTPTR)
DEF_FN_TYPE_2 (BT_FN_UV4SI_UV4SI_UCHAR, BT_UV4SI, BT_UV4SI, BT_UCHAR)
-DEF_FN_TYPE_2 (BT_FN_UV4SI_UV4SI_UINT, BT_UV4SI, BT_UV4SI, BT_UINT)
DEF_FN_TYPE_2 (BT_FN_UV4SI_UV4SI_UV4SI, BT_UV4SI, BT_UV4SI, BT_UV4SI)
DEF_FN_TYPE_2 (BT_FN_UV4SI_UV8HI_UV8HI, BT_UV4SI, BT_UV8HI, BT_UV8HI)
DEF_FN_TYPE_2 (BT_FN_UV8HI_UCHAR_UCHAR, BT_UV8HI, BT_UCHAR, BT_UCHAR)
@@ -245,7 +242,6 @@ DEF_FN_TYPE_2 (BT_FN_UV8HI_UV16QI_UV16QI, BT_UV8HI, BT_UV16QI, BT_UV16QI)
DEF_FN_TYPE_2 (BT_FN_UV8HI_UV4SI_UV4SI, BT_UV8HI, BT_UV4SI, BT_UV4SI)
DEF_FN_TYPE_2 (BT_FN_UV8HI_UV8HI_INTPTR, BT_UV8HI, BT_UV8HI, BT_INTPTR)
DEF_FN_TYPE_2 (BT_FN_UV8HI_UV8HI_UCHAR, BT_UV8HI, BT_UV8HI, BT_UCHAR)
-DEF_FN_TYPE_2 (BT_FN_UV8HI_UV8HI_UINT, BT_UV8HI, BT_UV8HI, BT_UINT)
DEF_FN_TYPE_2 (BT_FN_UV8HI_UV8HI_UV8HI, BT_UV8HI, BT_UV8HI, BT_UV8HI)
DEF_FN_TYPE_2 (BT_FN_V16QI_BV16QI_V16QI, BT_V16QI, BT_BV16QI, BT_V16QI)
DEF_FN_TYPE_2 (BT_FN_V16QI_UINT_VOIDCONSTPTR, BT_V16QI, BT_UINT, BT_VOIDCONSTPTR)
diff --git a/gcc/config/s390/s390-builtins.def b/gcc/config/s390/s390-builtins.def
index f5540106adc..b09c303adc0 100644
--- a/gcc/config/s390/s390-builtins.def
+++ b/gcc/config/s390/s390-builtins.def
@@ -28,7 +28,6 @@
#undef O_U12
#undef O_U16
#undef O_U32
-#undef O_U64
#undef O_M12
@@ -89,11 +88,6 @@
#undef O3_U32
#undef O4_U32
-#undef O1_U64
-#undef O2_U64
-#undef O3_U64
-#undef O4_U64
-
#undef O1_M12
#undef O2_M12
#undef O3_M12
@@ -163,21 +157,20 @@
#define O_U12 7 /* unsigned 16 bit literal */
#define O_U16 8 /* unsigned 16 bit literal */
#define O_U32 9 /* unsigned 32 bit literal */
-#define O_U64 10 /* unsigned 64 bit literal */
-#define O_M12 11 /* matches bitmask of 12 */
+#define O_M12 10 /* matches bitmask of 12 */
-#define O_S2 12 /* signed 2 bit literal */
-#define O_S3 13 /* signed 3 bit literal */
-#define O_S4 14 /* signed 4 bit literal */
-#define O_S5 15 /* signed 5 bit literal */
-#define O_S8 16 /* signed 8 bit literal */
-#define O_S12 17 /* signed 12 bit literal */
-#define O_S16 18 /* signed 16 bit literal */
-#define O_S32 19 /* signed 32 bit literal */
+#define O_S2 11 /* signed 2 bit literal */
+#define O_S3 12 /* signed 3 bit literal */
+#define O_S4 13 /* signed 4 bit literal */
+#define O_S5 14 /* signed 5 bit literal */
+#define O_S8 15 /* signed 8 bit literal */
+#define O_S12 16 /* signed 12 bit literal */
+#define O_S16 17 /* signed 16 bit literal */
+#define O_S32 18 /* signed 32 bit literal */
-#define O_ELEM 20 /* Element selector requiring modulo arithmetic. */
-#define O_LIT 21 /* Operand must be a literal fitting the target type. */
+#define O_ELEM 19 /* Element selector requiring modulo arithmetic. */
+#define O_LIT 20 /* Operand must be a literal fitting the target type. */
#define O_SHIFT 5
@@ -230,11 +223,6 @@
#define O3_U32 (O_U32 << (2 * O_SHIFT))
#define O4_U32 (O_U32 << (3 * O_SHIFT))
-#define O1_U64 O_U64
-#define O2_U64 (O_U64 << O_SHIFT)
-#define O3_U64 (O_U64 << (2 * O_SHIFT))
-#define O4_U64 (O_U64 << (3 * O_SHIFT))
-
#define O1_M12 O_M12
#define O2_M12 (O_M12 << O_SHIFT)
#define O3_M12 (O_M12 << (2 * O_SHIFT))
@@ -2001,19 +1989,19 @@ B_DEF (s390_verllvf, vrotlv4si3, 0,
B_DEF (s390_verllvg, vrotlv2di3, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UV2DI)
OB_DEF (s390_vec_rli, s390_vec_rli_u8, s390_vec_rli_s64, B_VX, BT_FN_OV4SI_OV4SI_ULONG)
-OB_DEF_VAR (s390_vec_rli_u8, s390_verllb, 0, O2_U64, BT_OV_UV16QI_UV16QI_ULONG)
-OB_DEF_VAR (s390_vec_rli_s8, s390_verllb, 0, O2_U64, BT_OV_V16QI_V16QI_ULONG)
-OB_DEF_VAR (s390_vec_rli_u16, s390_verllh, 0, O2_U64, BT_OV_UV8HI_UV8HI_ULONG)
-OB_DEF_VAR (s390_vec_rli_s16, s390_verllh, 0, O2_U64, BT_OV_V8HI_V8HI_ULONG)
-OB_DEF_VAR (s390_vec_rli_u32, s390_verllf, 0, O2_U64, BT_OV_UV4SI_UV4SI_ULONG)
-OB_DEF_VAR (s390_vec_rli_s32, s390_verllf, 0, O2_U64, BT_OV_V4SI_V4SI_ULONG)
-OB_DEF_VAR (s390_vec_rli_u64, s390_verllg, 0, O2_U64, BT_OV_UV2DI_UV2DI_ULONG)
-OB_DEF_VAR (s390_vec_rli_s64, s390_verllg, 0, O2_U64, BT_OV_V2DI_V2DI_ULONG)
-
-B_DEF (s390_verllb, rotlv16qi3, 0, B_VX, O2_U32, BT_FN_UV16QI_UV16QI_UINT)
-B_DEF (s390_verllh, rotlv8hi3, 0, B_VX, O2_U32, BT_FN_UV8HI_UV8HI_UINT)
-B_DEF (s390_verllf, rotlv4si3, 0, B_VX, O2_U32, BT_FN_UV4SI_UV4SI_UINT)
-B_DEF (s390_verllg, rotlv2di3, 0, B_VX, O2_U32, BT_FN_UV2DI_UV2DI_UINT)
+OB_DEF_VAR (s390_vec_rli_u8, s390_verllb, 0, 0, BT_OV_UV16QI_UV16QI_ULONG)
+OB_DEF_VAR (s390_vec_rli_s8, s390_verllb, 0, 0, BT_OV_V16QI_V16QI_ULONG)
+OB_DEF_VAR (s390_vec_rli_u16, s390_verllh, 0, 0, BT_OV_UV8HI_UV8HI_ULONG)
+OB_DEF_VAR (s390_vec_rli_s16, s390_verllh, 0, 0, BT_OV_V8HI_V8HI_ULONG)
+OB_DEF_VAR (s390_vec_rli_u32, s390_verllf, 0, 0, BT_OV_UV4SI_UV4SI_ULONG)
+OB_DEF_VAR (s390_vec_rli_s32, s390_verllf, 0, 0, BT_OV_V4SI_V4SI_ULONG)
+OB_DEF_VAR (s390_vec_rli_u64, s390_verllg, 0, 0, BT_OV_UV2DI_UV2DI_ULONG)
+OB_DEF_VAR (s390_vec_rli_s64, s390_verllg, 0, 0, BT_OV_V2DI_V2DI_ULONG)
+
+B_DEF (s390_verllb, rotlv16qi3, 0, B_VX, 0, BT_FN_UV16QI_UV16QI_UCHAR)
+B_DEF (s390_verllh, rotlv8hi3, 0, B_VX, 0, BT_FN_UV8HI_UV8HI_UCHAR)
+B_DEF (s390_verllf, rotlv4si3, 0, B_VX, 0, BT_FN_UV4SI_UV4SI_UCHAR)
+B_DEF (s390_verllg, rotlv2di3, 0, B_VX, 0, BT_FN_UV2DI_UV2DI_UCHAR)
OB_DEF (s390_vec_rl_mask, s390_vec_rl_mask_s8,s390_vec_rl_mask_u64,B_VX, BT_FN_OV4SI_OV4SI_OV4SI_UCHAR)
OB_DEF_VAR (s390_vec_rl_mask_s8, s390_verimb, 0, O3_U8, BT_OV_V16QI_V16QI_UV16QI_UCHAR)
diff --git a/gcc/config/s390/s390.cc b/gcc/config/s390/s390.cc
index b3603bea7a4..29b5dc97920 100644
--- a/gcc/config/s390/s390.cc
+++ b/gcc/config/s390/s390.cc
@@ -815,8 +815,8 @@ s390_const_operand_ok (tree arg, int argnum, int op_flags, tree decl)
{
if (O_UIMM_P (op_flags))
{
- unsigned HOST_WIDE_INT bitwidths[] = { 1, 2, 3, 4, 5, 8, 12, 16, 32, 64, 4 };
- unsigned HOST_WIDE_INT bitmasks[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 12 };
+ unsigned HOST_WIDE_INT bitwidths[] = { 1, 2, 3, 4, 5, 8, 12, 16, 32, 4 };
+ unsigned HOST_WIDE_INT bitmasks[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 12 };
unsigned HOST_WIDE_INT bitwidth = bitwidths[op_flags - O_U1];
unsigned HOST_WIDE_INT bitmask = bitmasks[op_flags - O_U1];
@@ -824,7 +824,7 @@ s390_const_operand_ok (tree arg, int argnum, int op_flags, tree decl)
gcc_assert(ARRAY_SIZE(bitmasks) == (O_M12 - O_U1 + 1));
if (!tree_fits_uhwi_p (arg)
- || tree_to_uhwi (arg) > ((HOST_WIDE_INT_1U << (bitwidth - 1) << 1) - 1)
+ || tree_to_uhwi (arg) > (HOST_WIDE_INT_1U << bitwidth) - 1
|| (bitmask && tree_to_uhwi (arg) & ~bitmask))
{
if (bitmask)
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2023-11-27 11:53 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-11-27 11:53 [gcc r14-5874] s390: Fixup builtins vec_rli and verll Stefan Schulze Frielinghaus
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).