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* [gcc r14-6180] i386: Fix -fcf-protection -Os ICE due to movabsq peephole2 [PR112845]
@ 2023-12-05 12:18 Jakub Jelinek
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From: Jakub Jelinek @ 2023-12-05 12:18 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:e0786ca9a18c50ad08c40936b228e325193664b8

commit r14-6180-ge0786ca9a18c50ad08c40936b228e325193664b8
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Tue Dec 5 13:17:57 2023 +0100

    i386: Fix -fcf-protection -Os ICE due to movabsq peephole2 [PR112845]
    
    The following testcase ICEs in the movabsq $(i32 << shift), r64 peephole2
    I've added a while back to use smaller code than movabsq if possible.
    If i32 is 0xfa1e0ff3 and shift is not divisible by 8, then it creates
    an invalid insn (as 0xfa1e0ff3 CONST_INT is not allowed as
    x86_64_immediate_operand nor x86_64_zext_immediate_operand), the peephole2
    even triggers on it again and again (this time with shift 0) until it gives
    up.
    
    The following patch fixes that.  As ix86_endbr_immediate_operand needs a
    CONST_INT and it is hopefully rare, I chose to use FAIL rather than handling
    it in the condition (where I'd probably need to call ctz_hwi again etc.).
    
    2023-12-05  Jakub Jelinek  <jakub@redhat.com>
    
            PR target/112845
            * config/i386/i386.md (movabsq $(i32 << shift), r64 peephole2): FAIL
            if the new immediate is ix86_endbr_immediate_operand.

Diff:
---
 gcc/config/i386/i386.md         | 5 ++++-
 gcc/testsuite/gcc.dg/pr112845.c | 9 +++++++++
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 7641b479670..df7f9172381 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2699,7 +2699,10 @@
 	      (clobber (reg:CC FLAGS_REG))])]
 {
   int shift = ctz_hwi (UINTVAL (operands[1]));
-  operands[1] = gen_int_mode (UINTVAL (operands[1]) >> shift, DImode);
+  rtx op1 = gen_int_mode (UINTVAL (operands[1]) >> shift, DImode);
+  if (ix86_endbr_immediate_operand (op1, VOIDmode))
+    FAIL;
+  operands[1] = op1;
   operands[2] = gen_int_mode (shift, QImode);
 })
 
diff --git a/gcc/testsuite/gcc.dg/pr112845.c b/gcc/testsuite/gcc.dg/pr112845.c
new file mode 100644
index 00000000000..ece6f451e75
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr112845.c
@@ -0,0 +1,9 @@
+/* PR target/112845 */
+/* { dg-do compile { target cet } } */
+/* { dg-options "-Os -fcf-protection" } */
+
+unsigned long long
+foo (void)
+{
+  return 0xfa1e0ff3ULL << 3;
+}

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