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From: Jakub Jelinek <jakub@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-6210] i386: Move vzeroupper pass from after reload pass to after postreload_cse [PR112760] Date: Wed, 6 Dec 2023 08:59:51 +0000 (GMT) [thread overview] Message-ID: <20231206085951.8451D3858D38@sourceware.org> (raw) https://gcc.gnu.org/g:e44ed92dbbe9d4e5c23f486cd2f77a6f9ee513c5 commit r14-6210-ge44ed92dbbe9d4e5c23f486cd2f77a6f9ee513c5 Author: Jakub Jelinek <jakub@redhat.com> Date: Wed Dec 6 09:59:12 2023 +0100 i386: Move vzeroupper pass from after reload pass to after postreload_cse [PR112760] Regardless of the outcome of the REG_UNUSED discussions, I think it is a good idea to move the vzeroupper pass one pass later. As can be seen in the multiple PRs and as postreload.cc documents, reload/LRA is known to create dead statements quite often, which is the reason why we have postreload_cse pass at all. Doing vzeroupper pass before such cleanup means the pass including df_analyze for it needs to process more instructions than needed and because mode switching adds note problem, also higher chance of having stale REG_UNUSED notes. And, I really don't see why vzeroupper can't wait until those cleanups are done. 2023-12-06 Jakub Jelinek <jakub@redhat.com> PR rtl-optimization/112760 * config/i386/i386-passes.def (pass_insert_vzeroupper): Insert after pass_postreload_cse rather than pass_reload. * config/i386/i386-features.cc (rest_of_handle_insert_vzeroupper): Adjust comment for it. * gcc.dg/pr112760.c: New test. Diff: --- gcc/config/i386/i386-features.cc | 9 +++++---- gcc/config/i386/i386-passes.def | 2 +- gcc/testsuite/gcc.dg/pr112760.c | 22 ++++++++++++++++++++++ 3 files changed, 28 insertions(+), 5 deletions(-) diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc index 6fac67e9a28..e6fc135f32f 100644 --- a/gcc/config/i386/i386-features.cc +++ b/gcc/config/i386/i386-features.cc @@ -2627,10 +2627,11 @@ convert_scalars_to_vector (bool timode_p) static unsigned int rest_of_handle_insert_vzeroupper (void) { - /* vzeroupper instructions are inserted immediately after reload to - account for possible spills from 256bit or 512bit registers. The pass - reuses mode switching infrastructure by re-running mode insertion - pass, so disable entities that have already been processed. */ + /* vzeroupper instructions are inserted immediately after reload and + postreload_cse to clean up after it a little bit to account for possible + spills from 256bit or 512bit registers. The pass reuses mode switching + infrastructure by re-running mode insertion pass, so disable entities + that have already been processed. */ for (int i = 0; i < MAX_386_ENTITIES; i++) ix86_optimize_mode_switching[i] = 0; diff --git a/gcc/config/i386/i386-passes.def b/gcc/config/i386/i386-passes.def index 90f2234eb00..2d189810ec4 100644 --- a/gcc/config/i386/i386-passes.def +++ b/gcc/config/i386/i386-passes.def @@ -24,7 +24,7 @@ along with GCC; see the file COPYING3. If not see REPLACE_PASS (PASS, INSTANCE, TGT_PASS) */ - INSERT_PASS_AFTER (pass_reload, 1, pass_insert_vzeroupper); + INSERT_PASS_AFTER (pass_postreload_cse, 1, pass_insert_vzeroupper); INSERT_PASS_AFTER (pass_combine, 1, pass_stv, false /* timode_p */); /* Run the 64-bit STV pass before the CSE pass so that CONST0_RTX and CONSTM1_RTX generated by the STV pass can be CSEed. */ diff --git a/gcc/testsuite/gcc.dg/pr112760.c b/gcc/testsuite/gcc.dg/pr112760.c new file mode 100644 index 00000000000..b4ec70e4701 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr112760.c @@ -0,0 +1,22 @@ +/* PR rtl-optimization/112760 */ +/* { dg-do run } */ +/* { dg-options "-O2 -fno-dce -fno-guess-branch-probability --param=max-cse-insns=0" } */ +/* { dg-additional-options "-m8bit-idiv -mavx" { target i?86-*-* x86_64-*-* } } */ + +unsigned g; + +__attribute__((__noipa__)) unsigned short +foo (unsigned short a, unsigned short b) +{ + unsigned short x = __builtin_add_overflow_p (a, g, (unsigned short) 0); + g -= g / b; + return x; +} + +int +main () +{ + unsigned short x = foo (40, 6); + if (x != 0) + __builtin_abort (); +}
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