From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 8D3533858C33; Tue, 23 Jan 2024 05:21:22 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8D3533858C33 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1705987283; bh=CVaB/21ZqDi7sMFLlqVnKNSsySoqNcyoQkMJR749A/I=; h=From:To:Subject:Date:From; b=j8kLe1gHfvClyVNunjil3rlFCem30VgLp1vVHujISd40QHQqU2vAzBC3HCtHfuL3d 0pn3BoHVgjWFo5k9lTbj6XwdzlZagcbPpCf1W3CFC7E4itp7sGa+ZKg/dQEuORNE73 d/N7KLorwmo/0sa0f/BnGtORhN4xuvkXzcgk05qg= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work154-dmf)] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work154-dmf X-Git-Oldrev: 1aea7d9bdfb42cdbf956e73765b5d16ba9d7f4ae X-Git-Newrev: 3b23fe060c39281b89ed3130615a3c41627e7b13 Message-Id: <20240123052123.8D3533858C33@sourceware.org> Date: Tue, 23 Jan 2024 05:21:22 +0000 (GMT) List-Id: https://gcc.gnu.org/g:3b23fe060c39281b89ed3130615a3c41627e7b13 commit 3b23fe060c39281b89ed3130615a3c41627e7b13 Author: Michael Meissner Date: Tue Jan 23 00:16:58 2024 -0500 PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair. This patch re-enables generating load and store vector pair instructions when doing certain memory copy operations when -mcpu=future is used. During power10 development, it was determined that using store vector pair instructions were problematical in a few cases, so we disabled generating load and store vector pair instructions for memory options by default. This patch re-enables generating these instructions if -mcpu=future is used. The patches have been tested on both little and big endian systems. Can I check it into the master branch? 2024-01-23 Michael Meissner gcc/ * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS): Add -mblock-ops-vector-pair. (POWERPC_MASKS): Likewise. Diff: --- gcc/config/rs6000/rs6000-cpus.def | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 8754635f3d9..b6cd6d8cc84 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -90,6 +90,7 @@ /* Flags for a potential future processor that may or may not be delivered. */ #define ISA_FUTURE_MASKS (ISA_3_1_MASKS_SERVER \ + | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \ | OPTION_MASK_FUTURE) /* Flags that need to be turned off if -mno-power9-vector. */ @@ -127,6 +128,7 @@ /* Mask of all options to set the default isa flags based on -mcpu=. */ #define POWERPC_MASKS (OPTION_MASK_ALTIVEC \ + | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \ | OPTION_MASK_CMPB \ | OPTION_MASK_CRYPTO \ | OPTION_MASK_DFP \