From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1923) id 2E3B13858021; Tue, 23 Jan 2024 20:58:03 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 2E3B13858021 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1706043483; bh=MUq7shnHsNAydSX3GPvb6FQlK7klTjqoTIquebIRBXc=; h=From:To:Subject:Date:From; b=aIM9IPQ79y5+6Oa5XVVf1DzeaWSwsz2RTKHfmiVhyeL7dOr/WeBqr8KKTiCnzbL72 H20LbB6NY3MKl9oaLVu5+7tqqRERb8MpFUBrsJEjrXFQK2vJ1YdjLleMrTrhqhmss6 9u/mKXd42I4YJYDTbOKrcHPMxH7l75E68YSAG01c= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Philipp Tomsich To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/vendors/vrull/heads/slp-improvements)] Add testcase for #344 X-Act-Checkin: gcc X-Git-Author: Manolis Tsamis X-Git-Refname: refs/vendors/vrull/heads/slp-improvements X-Git-Oldrev: 8bc4eeeaedff640600bfb3e6a43c8baef10e87cf X-Git-Newrev: be077bfec2c9d3beec3cd51f1912a27cb7c7ab63 Message-Id: <20240123205803.2E3B13858021@sourceware.org> Date: Tue, 23 Jan 2024 20:58:03 +0000 (GMT) List-Id: https://gcc.gnu.org/g:be077bfec2c9d3beec3cd51f1912a27cb7c7ab63 commit be077bfec2c9d3beec3cd51f1912a27cb7c7ab63 Author: Manolis Tsamis Date: Tue Nov 28 15:31:17 2023 +0100 Add testcase for #344 Diff: --- gcc/testsuite/gcc.target/aarch64/vins_uzp.c | 36 +++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/gcc/testsuite/gcc.target/aarch64/vins_uzp.c b/gcc/testsuite/gcc.target/aarch64/vins_uzp.c new file mode 100644 index 00000000000..d82d1f43c15 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/vins_uzp.c @@ -0,0 +1,36 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-require-effective-target aarch64_little_endian } */ + +typedef int v4si __attribute__ ((vector_size (4 * sizeof (int)))); + +v4si case1(v4si a, v4si b) { + return __builtin_shufflevector (a, b, 0, 5, 0, 5); +} + +v4si case2(v4si a, v4si b) { + return __builtin_shufflevector (a, b, 1, 5, 1, 5); +} + +v4si case3(v4si a, v4si b) { + return __builtin_shufflevector (a, b, 0, 6, 0, 6); +} + +v4si case4(v4si a, v4si b) { + return __builtin_shufflevector (a, b, 1, 7, 1, 7); +} + +v4si case5(v4si a, v4si b) { + return __builtin_shufflevector (a, b, 2, 7, 2, 7); +} + +v4si case6(v4si a, v4si b) { + return __builtin_shufflevector (b, a, 2, 7, 2, 7); +} + +v4si case7(v4si a, v4si b) { + return __builtin_shufflevector (a, b, 7, 2, 7, 2); +} + +/* { dg-final { scan-assembler-not {\ttbl\t} } } */ +/* { dg-final { scan-assembler-not {\tldr\t} } } */