From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7877) id 564E63858C52; Thu, 25 Jan 2024 07:55:28 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 564E63858C52 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1706169328; bh=a35zU/8VlMkodvgedY0W8BS71LvysK89+MbDQcVq9ko=; h=From:To:Subject:Date:From; b=gVqJKusltiEbYqc2ilXFptTqmnGZZFCXAjzLzZfsqRP6KB4h5ZAfK3x9P2KLgHMR5 /qqPAscO8ll1bJzYdXlFkOwB37uz+t0kLxZ95iF+eBiQsDAcCR6HHjmWjmmx/KELnS iKFE6Cp50YubIx95wWWgMBlg/k++/xG3cdbAlXxk= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: LuluCheng To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-8414] LoongArch: Remove vec_concatz pattern. X-Act-Checkin: gcc X-Git-Author: Jiahao Xu X-Git-Refname: refs/heads/master X-Git-Oldrev: 578c7b91f418ebbef1bf169117815409e06f5197 X-Git-Newrev: 77159546b2848b61159ac49882f7b1144e62eaaa Message-Id: <20240125075528.564E63858C52@sourceware.org> Date: Thu, 25 Jan 2024 07:55:28 +0000 (GMT) List-Id: https://gcc.gnu.org/g:77159546b2848b61159ac49882f7b1144e62eaaa commit r14-8414-g77159546b2848b61159ac49882f7b1144e62eaaa Author: Jiahao Xu Date: Wed Jan 24 17:19:13 2024 +0800 LoongArch: Remove vec_concatz pattern. It is incorrect to use vld/vori to implement the vec_concatz because when the LSX instruction is used to update the value of the vector register, the upper 128 bits of the vector register will not be zeroed. gcc/ChangeLog: * config/loongarch/lasx.md (@vec_concatz): Remove this define_insn pattern. * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init): Use vec_concat. Diff: --- gcc/config/loongarch/lasx.md | 15 --------------- gcc/config/loongarch/loongarch.cc | 17 ++++++----------- 2 files changed, 6 insertions(+), 26 deletions(-) diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md index 72f7161311c..5d478b92a2f 100644 --- a/gcc/config/loongarch/lasx.md +++ b/gcc/config/loongarch/lasx.md @@ -582,21 +582,6 @@ [(set_attr "type" "simd_insert") (set_attr "mode" "")]) -(define_insn "@vec_concatz" - [(set (match_operand:LASX 0 "register_operand" "=f") - (vec_concat:LASX - (match_operand: 1 "nonimmediate_operand") - (match_operand: 2 "const_0_operand")))] - "ISA_HAS_LASX" -{ - if (MEM_P (operands[1])) - return "vld\t%w0,%1"; - else - return "vori.b\t%w0,%w1,0"; -} - [(set_attr "type" "simd_splat") - (set_attr "mode" "")]) - (define_insn "vec_concat" [(set (match_operand:LASX 0 "register_operand" "=f") (vec_concat:LASX diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index da22fd63e91..dba1252c8f7 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -9917,17 +9917,12 @@ loongarch_expand_vector_group_init (rtx target, rtx vals) gcc_unreachable (); } - if (high == CONST0_RTX (half_mode)) - emit_insn (gen_vec_concatz (vmode, target, low, high)); - else - { - if (!register_operand (low, half_mode)) - low = force_reg (half_mode, low); - if (!register_operand (high, half_mode)) - high = force_reg (half_mode, high); - emit_insn (gen_rtx_SET (target, - gen_rtx_VEC_CONCAT (vmode, low, high))); - } + if (!register_operand (low, half_mode)) + low = force_reg (half_mode, low); + if (!register_operand (high, half_mode)) + high = force_reg (half_mode, high); + emit_insn (gen_rtx_SET (target, + gen_rtx_VEC_CONCAT (vmode, low, high))); } /* Expand initialization of a vector which has all same elements. */