[gcc r14-8422] aarch64: Fix out-of-bounds ENCODED_ELT access [PR113572]

[Richard Sandiford <rsandifo@gcc.gnu.org>]

https://gcc.gnu.org/g:c3de14ba1ba0e77254118af64ed881f115ee42a0

commit r14-8422-gc3de14ba1ba0e77254118af64ed881f115ee42a0
Author: Richard Sandiford <richard.sandiford@arm.com>
Date:   Thu Jan 25 12:03:18 2024 +0000

    aarch64: Fix out-of-bounds ENCODED_ELT access [PR113572]
    
    When generalising vector_cst_all_same, I'd forgotten to update
    VECTOR_CST_ENCODED_ELT to VECTOR_CST_ELT.  The check deliberately
    looks at implicitly encoded elements in some cases.
    
    gcc/
            PR target/113572
            * config/aarch64/aarch64-sve-builtins.cc (vector_cst_all_same):
            Check VECTOR_CST_ELT instead of VECTOR_CST_ENCODED_ELT
    
    gcc/testsuite/
            PR target/113572
            * gcc.target/aarch64/sve/pr113572.c: New test.

Diff:
---
 gcc/config/aarch64/aarch64-sve-builtins.cc      |  2 +-
 gcc/testsuite/gcc.target/aarch64/sve/pr113572.c | 12 ++++++++++++
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/gcc/config/aarch64/aarch64-sve-builtins.cc b/gcc/config/aarch64/aarch64-sve-builtins.cc
index c2f1486315f..11f5c5c500c 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins.cc
+++ b/gcc/config/aarch64/aarch64-sve-builtins.cc
@@ -3474,7 +3474,7 @@ vector_cst_all_same (tree v, unsigned int step)
   unsigned int nelts = lcm * VECTOR_CST_NELTS_PER_PATTERN (v);
   tree first_el = VECTOR_CST_ENCODED_ELT (v, 0);
   for (unsigned int i = 0; i < nelts; i += step)
-    if (!operand_equal_p (VECTOR_CST_ENCODED_ELT (v, i), first_el, 0))
+    if (!operand_equal_p (VECTOR_CST_ELT (v, i), first_el, 0))
       return false;
 
   return true;
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr113572.c b/gcc/testsuite/gcc.target/aarch64/sve/pr113572.c
new file mode 100644
index 00000000000..a5e6b7e9907
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr113572.c
@@ -0,0 +1,12 @@
+#include <arm_sve.h>
+
+uint64_t u;
+struct S { int i; } he;
+
+void
+foo ()
+{
+  svuint64_t vld_clz = svld1_u64 (svwhilelt_b64 (0, 4), (uint64_t *) &he);
+  vld_clz = svclz_u64_z (svwhilelt_b64 (0, 1), vld_clz);
+  svst1_u64 (svwhilelt_b64 (0, 1), &u, vld_clz);
+}