From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 24E9E3858D28; Fri, 26 Jan 2024 00:21:01 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 24E9E3858D28 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1706228461; bh=gO7mvT2W9XahkQXLvsn29zr2QYJQ8rSZYpeaC2rD4rM=; h=From:To:Subject:Date:From; b=xjlkYPsv+pmldif42S3I0zxE9OUzCdpEq9AomHeIAnXo1njxvYkmldHSHx4v/fWmv PRQpIHeG3ICJpAw+wcc2fDlmHkcFNPIGEQlcZjjkTeYMnoeAZLXu2MkGEEnW6BXXBn VBrtGxT8zFvYred6RSxs5x7wff+ldr7Z4LyA+d7o= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work154-test)] Initial power11 patch. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work154-test X-Git-Oldrev: 2f96196ff8402a4f4b7a70ee8b1f20db202f1468 X-Git-Newrev: 004f5bf0caba824494e0b2e249341cc7d18bbecd Message-Id: <20240126002101.24E9E3858D28@sourceware.org> Date: Fri, 26 Jan 2024 00:21:01 +0000 (GMT) List-Id: https://gcc.gnu.org/g:004f5bf0caba824494e0b2e249341cc7d18bbecd commit 004f5bf0caba824494e0b2e249341cc7d18bbecd Author: Michael Meissner Date: Thu Jan 25 19:20:41 2024 -0500 Initial power11 patch. 2024-01-25 Michael Meissner gcc/ * config.gcc (powerpc*): Add power11 support. * config/rs6000/driver-rs6000.cc (asm_names): Pass -mpwr11 to assember if power11. * config/rs6000/ppc-auxv.h (PPC_PLATFORM_POWER10): Remove comment saying power10 platform number is unofficial. (PPC_PLATFORM_POWER11): Add new value for power11. * config/rs6000/rs6000-builtin.cc (cpu_is_info): Add support for generating .machine power11. * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define _ARCH_PWR11 if -mcpu=power11. * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_POWER11. (power11 cpu): Define. * config/rs6000/rs6000-opts.h (enum processor_type): Add comment about not adding PROCESSOR_POWER11. * config/rs6000/rs6000-tables.opt: Regenerate. * config/rs6000/rs6000.cc (rs6000_machine_from_flags): Add power11 support. (rs6000_opt_masks): Likewise. * config/rs6000/rs6000.h (ASM_CPU_SPEC): Add -mcpu=power11 support. * config/rs6000/rs6000.opt (-mpower11): Dummy option to flag -mcpu=power11. * doc/invoke.texi (PowerPC options): Document -mcpu=power11. Diff: --- gcc/config.gcc | 4 ++-- gcc/config/rs6000/driver-rs6000.cc | 2 ++ gcc/config/rs6000/ppc-auxv.h | 3 ++- gcc/config/rs6000/rs6000-builtin.cc | 1 + gcc/config/rs6000/rs6000-c.cc | 2 ++ gcc/config/rs6000/rs6000-cpus.def | 5 +++++ gcc/config/rs6000/rs6000-opts.h | 3 +++ gcc/config/rs6000/rs6000-tables.opt | 11 +++++++---- gcc/config/rs6000/rs6000.cc | 3 +++ gcc/config/rs6000/rs6000.h | 1 + gcc/config/rs6000/rs6000.opt | 3 +++ gcc/doc/invoke.texi | 4 ++-- 12 files changed, 33 insertions(+), 9 deletions(-) diff --git a/gcc/config.gcc b/gcc/config.gcc index b2d7d7dd4754..30f4c0acb4be 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -530,7 +530,7 @@ powerpc*-*-*) extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h" extra_headers="${extra_headers} amo.h" case x$with_cpu in - xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower10|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500) + xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500) cpu_is_64bit=yes ;; esac @@ -5554,7 +5554,7 @@ case "${target}" in eval "with_$which=405" ;; "" | common | native \ - | power[3456789] | power10 | power5+ | power6x \ + | power[3456789] | power1[01] | power5+ | power6x \ | powerpc | powerpc64 | powerpc64le \ | rs64 \ | 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \ diff --git a/gcc/config/rs6000/driver-rs6000.cc b/gcc/config/rs6000/driver-rs6000.cc index 244b3388c2ad..3f69695d6935 100644 --- a/gcc/config/rs6000/driver-rs6000.cc +++ b/gcc/config/rs6000/driver-rs6000.cc @@ -451,6 +451,7 @@ static const struct asm_name asm_names[] = { { "power8", "-mpwr8" }, { "power9", "-mpwr9" }, { "power10", "-mpwr10" }, + { "power11", "-mpwr11" }, { "powerpc", "-mppc" }, { "rs64", "-mppc" }, { "603", "-m603" }, @@ -479,6 +480,7 @@ static const struct asm_name asm_names[] = { { "power8", "%{mpower9-vector:-mpower9;:-mpower8}" }, { "power9", "-mpower9" }, { "power10", "-mpower10" }, + { "power11", "-mpower11" }, { "a2", "-ma2" }, { "powerpc", "-mppc" }, { "powerpc64", "-mppc64" }, diff --git a/gcc/config/rs6000/ppc-auxv.h b/gcc/config/rs6000/ppc-auxv.h index 364bba427d14..4e8636443f94 100644 --- a/gcc/config/rs6000/ppc-auxv.h +++ b/gcc/config/rs6000/ppc-auxv.h @@ -47,9 +47,10 @@ #define PPC_PLATFORM_PPC476 12 #define PPC_PLATFORM_POWER8 13 #define PPC_PLATFORM_POWER9 14 +#define PPC_PLATFORM_POWER10 15 /* This is not yet official. */ -#define PPC_PLATFORM_POWER10 15 +#define PPC_PLATFORM_POWER11 16 /* AT_HWCAP bits. These must match the values defined in the Linux kernel. */ #define PPC_FEATURE_32 0x80000000 diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc index 6698274031b9..f3ba1eccdbdc 100644 --- a/gcc/config/rs6000/rs6000-builtin.cc +++ b/gcc/config/rs6000/rs6000-builtin.cc @@ -2493,6 +2493,7 @@ static const struct const char *cpu; unsigned int cpuid; } cpu_is_info[] = { + { "power11", PPC_PLATFORM_POWER11 }, { "power10", PPC_PLATFORM_POWER10 }, { "power9", PPC_PLATFORM_POWER9 }, { "power8", PPC_PLATFORM_POWER8 }, diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc index ce0b14a8d373..ebed8b9554a7 100644 --- a/gcc/config/rs6000/rs6000-c.cc +++ b/gcc/config/rs6000/rs6000-c.cc @@ -447,6 +447,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9"); if ((flags & OPTION_MASK_POWER10) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10"); + if ((flags & OPTION_MASK_POWER11) != 0) + rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11"); if ((flags & OPTION_MASK_SOFT_FLOAT) != 0) rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT"); if ((flags & OPTION_MASK_RECIP_PRECISION) != 0) diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index d28cc87eb2a1..266abc6e728c 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -134,6 +134,7 @@ | OPTION_MASK_FPRND \ | OPTION_MASK_LOAD_VECTOR_PAIR \ | OPTION_MASK_POWER10 \ + | OPTION_MASK_POWER11 \ | OPTION_MASK_P10_FUSION \ | OPTION_MASK_HTM \ | OPTION_MASK_ISEL \ @@ -261,6 +262,10 @@ RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER RS6000_CPU ("power9", PROCESSOR_POWER9, MASK_POWERPC64 | ISA_3_0_MASKS_SERVER | OPTION_MASK_HTM) RS6000_CPU ("power10", PROCESSOR_POWER10, MASK_POWERPC64 | ISA_3_1_MASKS_SERVER) +/* Note, -mcpu=power11 is treated like -mcpu=power10, except for defining + _ARCH_PWR11, and using .machine power11. */ +RS6000_CPU ("power11", PROCESSOR_POWER10, MASK_POWERPC64 | ISA_3_1_MASKS_SERVER + | OPTION_MASK_POWER11) RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0) RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT | MASK_POWERPC64) diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h index 33fd0efc936f..02f070c668db 100644 --- a/gcc/config/rs6000/rs6000-opts.h +++ b/gcc/config/rs6000/rs6000-opts.h @@ -63,6 +63,9 @@ enum processor_type PROCESSOR_POWER9, PROCESSOR_POWER10, + /* We do not define PROCESSOR_POWER11, since GCC does not have differences + in code generation from power10. */ + PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_CELL, diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt index 65f46709716f..a5649fef1ece 100644 --- a/gcc/config/rs6000/rs6000-tables.opt +++ b/gcc/config/rs6000/rs6000-tables.opt @@ -186,14 +186,17 @@ EnumValue Enum(rs6000_cpu_opt_value) String(power10) Value(52) EnumValue -Enum(rs6000_cpu_opt_value) String(powerpc) Value(53) +Enum(rs6000_cpu_opt_value) String(power11) Value(53) EnumValue -Enum(rs6000_cpu_opt_value) String(powerpc64) Value(54) +Enum(rs6000_cpu_opt_value) String(powerpc) Value(54) EnumValue -Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(55) +Enum(rs6000_cpu_opt_value) String(powerpc64) Value(55) EnumValue -Enum(rs6000_cpu_opt_value) String(rs64) Value(56) +Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(56) + +EnumValue +Enum(rs6000_cpu_opt_value) String(rs64) Value(57) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 68a14c6f88a3..226b49b6aa70 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -5944,6 +5944,8 @@ rs6000_machine_from_flags (void) /* Disable the flags that should never influence the .machine selection. */ flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL); + if ((flags & OPTION_MASK_POWER11) != 0) + return "power11"; if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0) return "power10"; if ((flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0) @@ -24505,6 +24507,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] = { "float128-hardware", OPTION_MASK_FLOAT128_HW, false, true }, { "fprnd", OPTION_MASK_FPRND, false, true }, { "power10", OPTION_MASK_POWER10, false, true }, + { "power11", OPTION_MASK_POWER11, false, true }, { "hard-dfp", OPTION_MASK_DFP, false, true }, { "htm", OPTION_MASK_HTM, false, true }, { "isel", OPTION_MASK_ISEL, false, true }, diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 2291fe8d3a34..8957946bf948 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -107,6 +107,7 @@ to the assembler if -mpower9-vector was also used. */ #define ASM_CPU_SPEC \ "%{mcpu=native: %(asm_cpu_native); \ + mcpu=power11: -mpower11; \ mcpu=power10: -mpower10; \ mcpu=power9: -mpower9; \ mcpu=power8|mcpu=powerpc64le: %{mpower9-vector: -mpower9;: -mpower8}; \ diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 60b923f5e4b3..3606144ff253 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -581,6 +581,9 @@ Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save mpower10 Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved +mpower11 +Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) WarnRemoved + mprefixed Target Mask(PREFIXED) Var(rs6000_isa_flags) Generate (do not generate) prefixed memory instructions. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 278c931b6a3b..5b5939a274e6 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -30996,8 +30996,8 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403}, @samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5}, @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+}, @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8}, -@samp{power9}, @samp{power10}, @samp{powerpc}, @samp{powerpc64}, -@samp{powerpc64le}, @samp{rs64}, and @samp{native}. +@samp{power9}, @samp{power10}, @samp{power11}, @samp{powerpc}, +@samp{powerpc64}, @samp{powerpc64le}, @samp{rs64}, and @samp{native}. @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and @option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either