From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7924) id 531C73858C62; Fri, 26 Jan 2024 06:50:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 531C73858C62 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1706251831; bh=HlDEo12rDFhbIQXN/zao3HjeahLmyftJ1F/5GSf3/Rw=; h=From:To:Subject:Date:From; b=kLDxYyIEaMY6f7+IZg8HVCtmZ/WhFur9nnoVOHm7jkAqCk8QCcWIR9PjYzWBBr0HT W6JmQ+yoP+A2/agGXO1335Fb2zBELucwSdCU/RLXpFnAA0naR83sEllZIHuKGrrpsJ zIgR644nXmflgzSQXp5jSMn3QBXTvCu2lK6ikRFw= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Pan Li To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-8442] RISC-V: Fix incorrect LCM delete bug [VSETVL PASS] X-Act-Checkin: gcc X-Git-Author: Juzhe-Zhong X-Git-Refname: refs/heads/master X-Git-Oldrev: 0c2583dc2575f3f64e3d09e12c296eb56f01916d X-Git-Newrev: d40b3c1e439db05c835b6bd4fd5bba58fda71dd6 Message-Id: <20240126065031.531C73858C62@sourceware.org> Date: Fri, 26 Jan 2024 06:50:31 +0000 (GMT) List-Id: https://gcc.gnu.org/g:d40b3c1e439db05c835b6bd4fd5bba58fda71dd6 commit r14-8442-gd40b3c1e439db05c835b6bd4fd5bba58fda71dd6 Author: Juzhe-Zhong Date: Fri Jan 26 14:46:21 2024 +0800 RISC-V: Fix incorrect LCM delete bug [VSETVL PASS] This patch fixes the recent noticed bug in RV32 glibc. We incorrectly deleted a vsetvl: ... and a4,a4,a3 vmv.v.i v1,0 ---> Missed vsetvl cause illegal instruction report. vse8.v v1,0(a5) The root cause the laterin in LCM is incorrect. BB 358: avloc: n_bits = 2, set = {} kill: n_bits = 2, set = {} antloc: n_bits = 2, set = {} transp: n_bits = 2, set = {} avin: n_bits = 2, set = {} avout: n_bits = 2, set = {} del: n_bits = 2, set = {} cause LCM let BB 360 delete the vsetvl: BB 360: avloc: n_bits = 2, set = {} kill: n_bits = 2, set = {} antloc: n_bits = 2, set = {} transp: n_bits = 2, set = {0 1 } avin: n_bits = 2, set = {} avout: n_bits = 2, set = {} del: n_bits = 2, set = {1} Also, remove unknown vsetvl info into local computation since it is unnecessary. Tested on both RV32/RV64 no regression. PR target/113469 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Fix bug. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr113469.c: New test. Diff: --- gcc/config/riscv/riscv-vsetvl.cc | 19 ++++---- .../gcc.target/riscv/rvv/autovec/pr113469.c | 54 ++++++++++++++++++++++ 2 files changed, 64 insertions(+), 9 deletions(-) diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index da258b964fcb..1a398f025963 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -2543,8 +2543,10 @@ pre_vsetvl::compute_lcm_local_properties () vsetvl_info &header_info = block_info.get_entry_info (); vsetvl_info &footer_info = block_info.get_exit_info (); gcc_assert (footer_info.valid_p () || footer_info.unknown_p ()); - add_expr (m_exprs, header_info); - add_expr (m_exprs, footer_info); + if (header_info.valid_p ()) + add_expr (m_exprs, header_info); + if (footer_info.valid_p ()) + add_expr (m_exprs, footer_info); } int num_exprs = m_exprs.length (); @@ -2699,13 +2701,6 @@ pre_vsetvl::compute_lcm_local_properties () } } - for (const bb_info *bb : crtl->ssa->bbs ()) - { - unsigned bb_index = bb->index (); - bitmap_ior (m_kill[bb_index], m_transp[bb_index], m_avloc[bb_index]); - bitmap_not (m_kill[bb_index], m_kill[bb_index]); - } - for (const bb_info *bb : crtl->ssa->bbs ()) { unsigned bb_index = bb->index (); @@ -2714,6 +2709,12 @@ pre_vsetvl::compute_lcm_local_properties () bitmap_clear (m_antloc[bb_index]); bitmap_clear (m_transp[bb_index]); } + /* Compute ae_kill for each basic block using: + + ~(TRANSP | COMP) + */ + bitmap_ior (m_kill[bb_index], m_transp[bb_index], m_avloc[bb_index]); + bitmap_not (m_kill[bb_index], m_kill[bb_index]); } } diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113469.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113469.c new file mode 100644 index 000000000000..d1c118c02d6e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113469.c @@ -0,0 +1,54 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-vect-cost-model" } */ + +struct a { + int b; + int c : 1; + int : 1; +} d(); +typedef struct +{ + int e; + struct { + int f; + }; +} g; +int i; +char k, l, n; +void *m; +char *o; +void h(); +char *j(); +void p(int buf, __builtin_va_list ab, int q) { + do { + void *r[] = {&&s, &&t, &&u, &&v, &&w}; + int c; + goto *m; + s: + c = 1; + while (1) { + t: + u: + ae: + void *af = __builtin_va_arg(ab, void *); + h(p); + o = j(i); + if (o == 0) + goto ae; + l = 'S'; + break; + v: + g ah; + __builtin_memset(&ah, '\0', sizeof(g)); + h(n, __builtin_va_arg(ab, int), &ah); + break; + w: + if (__builtin_expect(q, 0)) + c = 0; + struct a ai = {'S', c}; + d(buf, ai, af); + } + } while (k); +} + +/* { dg-final { scan-assembler-times {vsetivli\tzero,\s*4,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 2 } } */