From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1666) id 161FB3858032; Wed, 31 Jan 2024 09:13:49 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 161FB3858032 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1706692429; bh=QNYpqL9DS45evrAtxYRnbuFIKv5PDpV1T6ouSozy30c=; h=From:To:Subject:Date:From; b=acycM8JgEKO/YWtHgeVRk3b1jf0jzkFRdQ20LirNHtoLfmfKypWD9U8Tq5j3Q4tSD 1ZYLWTk2OeR+hGTg9nnRHklkqScsyW7NMnPy/FDtr/s6bIOK2E4Mu5DrJBC7h34I2J 9vwWP2hu1o+q8fxkN5V+R9nJfrn0iJDvua1qMmbs= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Richard Biener To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-8645] tree-optimization/113670 - gather/scatter to/from hard registers X-Act-Checkin: gcc X-Git-Author: Richard Biener X-Git-Refname: refs/heads/master X-Git-Oldrev: e7964bf623c6df3cb415eeafd458b0b8394e6ea4 X-Git-Newrev: 924137b9012cee5603482242de08fbf0b2030f6a Message-Id: <20240131091349.161FB3858032@sourceware.org> Date: Wed, 31 Jan 2024 09:13:49 +0000 (GMT) List-Id: https://gcc.gnu.org/g:924137b9012cee5603482242de08fbf0b2030f6a commit r14-8645-g924137b9012cee5603482242de08fbf0b2030f6a Author: Richard Biener Date: Wed Jan 31 09:09:50 2024 +0100 tree-optimization/113670 - gather/scatter to/from hard registers The following makes sure we're not taking the address of hard registers when vectorizing appearant gathers or scatters to/from them. PR tree-optimization/113670 * tree-vect-data-refs.cc (vect_check_gather_scatter): Make sure we can take the address of the reference base. * gcc.target/i386/pr113670.c: New testcase. Diff: --- gcc/testsuite/gcc.target/i386/pr113670.c | 16 ++++++++++++++++ gcc/tree-vect-data-refs.cc | 5 +++++ 2 files changed, 21 insertions(+) diff --git a/gcc/testsuite/gcc.target/i386/pr113670.c b/gcc/testsuite/gcc.target/i386/pr113670.c new file mode 100644 index 000000000000..8b9d3744fe2e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr113670.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-msse2 -O2 -fno-vect-cost-model" } */ + +typedef float __attribute__ ((vector_size (16))) vec; +typedef int __attribute__ ((vector_size (16))) ivec; +ivec x; + +void +test (void) +{ + register vec a asm("xmm3"), b asm("xmm4"); + register ivec c asm("xmm5"); + for (int i = 0; i < 4; i++) + c[i] = a[i] < b[i] ? -1 : 1; + x = c; +} diff --git a/gcc/tree-vect-data-refs.cc b/gcc/tree-vect-data-refs.cc index f592aeb8028a..e6a3035064b2 100644 --- a/gcc/tree-vect-data-refs.cc +++ b/gcc/tree-vect-data-refs.cc @@ -4325,6 +4325,11 @@ vect_check_gather_scatter (stmt_vec_info stmt_info, loop_vec_info loop_vinfo, if (!multiple_p (pbitpos, BITS_PER_UNIT)) return false; + /* We need to be able to form an address to the base which for example + isn't possible for hard registers. */ + if (may_be_nonaddressable_p (base)) + return false; + poly_int64 pbytepos = exact_div (pbitpos, BITS_PER_UNIT); if (TREE_CODE (base) == MEM_REF)