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From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/work154-test)] Initial power11 patch.
Date: Wed, 31 Jan 2024 19:31:30 +0000 (GMT) [thread overview]
Message-ID: <20240131193130.605B53858C78@sourceware.org> (raw)
https://gcc.gnu.org/g:99077dd773a6245cdebea5dccb441cc0ef24930d
commit 99077dd773a6245cdebea5dccb441cc0ef24930d
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Jan 31 14:31:04 2024 -0500
Initial power11 patch.
This patch adds -mcpu=power11 support.
I did not add a separate PROCESSOR_POWER11 since power11 will generate exactly
the same code as power10. I did put a comment into rs6000-opts.h why we did
not create PROCESSOR_POWER11.
I used an option bit in rs6000_isa_flags to signal that we should put out a
".machine power11" instead of ".machine power10" and also define _ARCH_PWR11.
We could have a separate variable to hold the power11 status, but this would
require adding a lot of code that would be needed when we change the cpu via
attribute/pragma target and attribute target_clones. We would need to pass
additional arguments to the function rs6000_machine_from_flags and
rs6000_target_modify_macros which only take the isa flags variable.
I added some test cases to verify that -mcpu=power11, and that we can set
power11 via a target attribute/pragma or via target_clones attribute.
2024-01-31 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config.gcc (powerpc*): Add power11 support.
* config/rs6000/driver-rs6000.cc (asm_names): Pass -mpwr11 to assember
if power11.
* config/rs6000/ppc-auxv.h (PPC_PLATFORM_POWER10): Remove comment saying
power10 platform number is unofficial.
(PPC_PLATFORM_POWER11): Add new value for power11.
* config/rs6000/rs6000-builtin.cc (cpu_is_info): Add support for
generating .machine power11.
* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
_ARCH_PWR11 if -mcpu=power11.
* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add
OPTION_MASK_POWER11.
(power11 cpu): Define.
* config/rs6000/rs6000-opts.h (enum processor_type): Add comment about
not adding PROCESSOR_POWER11.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/rs6000.cc (rs6000_machine_from_flags): Add power11
support.
(rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.h (ASM_CPU_SPEC): Add -mcpu=power11 support.
* config/rs6000/rs6000.opt (-mpower11): Dummy option to flag
-mcpu=power11.
* doc/invoke.texi (PowerPC options): Document -mcpu=power11.
gcc/testsuite/
* gcc.target/powerpc/power11-1.c: New test.
* gcc.target/powerpc/power11-2.c: Likewise.
* gcc.target/powerpc/power11-3.c: Likewise.
* lib/target-supports.exp (check_effective_target_power11_ok): Add
power11 support.
Diff:
---
gcc/config.gcc | 4 ++--
gcc/config/rs6000/driver-rs6000.cc | 2 ++
gcc/config/rs6000/ppc-auxv.h | 3 ++-
gcc/config/rs6000/rs6000-builtin.cc | 1 +
gcc/config/rs6000/rs6000-c.cc | 2 ++
gcc/config/rs6000/rs6000-cpus.def | 5 +++++
gcc/config/rs6000/rs6000-opts.h | 3 +++
gcc/config/rs6000/rs6000-tables.opt | 11 +++++++----
gcc/config/rs6000/rs6000.cc | 3 +++
gcc/config/rs6000/rs6000.h | 1 +
gcc/config/rs6000/rs6000.opt | 3 +++
gcc/doc/invoke.texi | 4 ++--
gcc/testsuite/gcc.target/powerpc/power11-1.c | 13 +++++++++++++
gcc/testsuite/gcc.target/powerpc/power11-2.c | 20 ++++++++++++++++++++
gcc/testsuite/gcc.target/powerpc/power11-3.c | 10 ++++++++++
gcc/testsuite/lib/target-supports.exp | 17 +++++++++++++++++
16 files changed, 93 insertions(+), 9 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index b2d7d7dd4754..30f4c0acb4be 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -530,7 +530,7 @@ powerpc*-*-*)
extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h"
extra_headers="${extra_headers} amo.h"
case x$with_cpu in
- xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower10|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
+ xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
cpu_is_64bit=yes
;;
esac
@@ -5554,7 +5554,7 @@ case "${target}" in
eval "with_$which=405"
;;
"" | common | native \
- | power[3456789] | power10 | power5+ | power6x \
+ | power[3456789] | power1[01] | power5+ | power6x \
| powerpc | powerpc64 | powerpc64le \
| rs64 \
| 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
diff --git a/gcc/config/rs6000/driver-rs6000.cc b/gcc/config/rs6000/driver-rs6000.cc
index 244b3388c2ad..3f69695d6935 100644
--- a/gcc/config/rs6000/driver-rs6000.cc
+++ b/gcc/config/rs6000/driver-rs6000.cc
@@ -451,6 +451,7 @@ static const struct asm_name asm_names[] = {
{ "power8", "-mpwr8" },
{ "power9", "-mpwr9" },
{ "power10", "-mpwr10" },
+ { "power11", "-mpwr11" },
{ "powerpc", "-mppc" },
{ "rs64", "-mppc" },
{ "603", "-m603" },
@@ -479,6 +480,7 @@ static const struct asm_name asm_names[] = {
{ "power8", "%{mpower9-vector:-mpower9;:-mpower8}" },
{ "power9", "-mpower9" },
{ "power10", "-mpower10" },
+ { "power11", "-mpower11" },
{ "a2", "-ma2" },
{ "powerpc", "-mppc" },
{ "powerpc64", "-mppc64" },
diff --git a/gcc/config/rs6000/ppc-auxv.h b/gcc/config/rs6000/ppc-auxv.h
index 364bba427d14..4e8636443f94 100644
--- a/gcc/config/rs6000/ppc-auxv.h
+++ b/gcc/config/rs6000/ppc-auxv.h
@@ -47,9 +47,10 @@
#define PPC_PLATFORM_PPC476 12
#define PPC_PLATFORM_POWER8 13
#define PPC_PLATFORM_POWER9 14
+#define PPC_PLATFORM_POWER10 15
/* This is not yet official. */
-#define PPC_PLATFORM_POWER10 15
+#define PPC_PLATFORM_POWER11 16
/* AT_HWCAP bits. These must match the values defined in the Linux kernel. */
#define PPC_FEATURE_32 0x80000000
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 6698274031b9..f3ba1eccdbdc 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -2493,6 +2493,7 @@ static const struct
const char *cpu;
unsigned int cpuid;
} cpu_is_info[] = {
+ { "power11", PPC_PLATFORM_POWER11 },
{ "power10", PPC_PLATFORM_POWER10 },
{ "power9", PPC_PLATFORM_POWER9 },
{ "power8", PPC_PLATFORM_POWER8 },
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index ce0b14a8d373..ebed8b9554a7 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -447,6 +447,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
if ((flags & OPTION_MASK_POWER10) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
+ if ((flags & OPTION_MASK_POWER11) != 0)
+ rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index d28cc87eb2a1..266abc6e728c 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -134,6 +134,7 @@
| OPTION_MASK_FPRND \
| OPTION_MASK_LOAD_VECTOR_PAIR \
| OPTION_MASK_POWER10 \
+ | OPTION_MASK_POWER11 \
| OPTION_MASK_P10_FUSION \
| OPTION_MASK_HTM \
| OPTION_MASK_ISEL \
@@ -261,6 +262,10 @@ RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER
RS6000_CPU ("power9", PROCESSOR_POWER9, MASK_POWERPC64 | ISA_3_0_MASKS_SERVER
| OPTION_MASK_HTM)
RS6000_CPU ("power10", PROCESSOR_POWER10, MASK_POWERPC64 | ISA_3_1_MASKS_SERVER)
+/* Note, -mcpu=power11 is treated like -mcpu=power10, except for defining
+ _ARCH_PWR11, and using .machine power11. */
+RS6000_CPU ("power11", PROCESSOR_POWER10, MASK_POWERPC64 | ISA_3_1_MASKS_SERVER
+ | OPTION_MASK_POWER11)
RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT
| MASK_POWERPC64)
diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h
index 33fd0efc936f..02f070c668db 100644
--- a/gcc/config/rs6000/rs6000-opts.h
+++ b/gcc/config/rs6000/rs6000-opts.h
@@ -63,6 +63,9 @@ enum processor_type
PROCESSOR_POWER9,
PROCESSOR_POWER10,
+ /* We do not define PROCESSOR_POWER11, since GCC does not have differences
+ in code generation from power10. */
+
PROCESSOR_RS64A,
PROCESSOR_MPCCORE,
PROCESSOR_CELL,
diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt
index 65f46709716f..a5649fef1ece 100644
--- a/gcc/config/rs6000/rs6000-tables.opt
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -186,14 +186,17 @@ EnumValue
Enum(rs6000_cpu_opt_value) String(power10) Value(52)
EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc) Value(53)
+Enum(rs6000_cpu_opt_value) String(power11) Value(53)
EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc64) Value(54)
+Enum(rs6000_cpu_opt_value) String(powerpc) Value(54)
EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(55)
+Enum(rs6000_cpu_opt_value) String(powerpc64) Value(55)
EnumValue
-Enum(rs6000_cpu_opt_value) String(rs64) Value(56)
+Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(56)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(rs64) Value(57)
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 68a14c6f88a3..226b49b6aa70 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -5944,6 +5944,8 @@ rs6000_machine_from_flags (void)
/* Disable the flags that should never influence the .machine selection. */
flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL);
+ if ((flags & OPTION_MASK_POWER11) != 0)
+ return "power11";
if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
return "power10";
if ((flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0)
@@ -24505,6 +24507,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
{ "float128-hardware", OPTION_MASK_FLOAT128_HW, false, true },
{ "fprnd", OPTION_MASK_FPRND, false, true },
{ "power10", OPTION_MASK_POWER10, false, true },
+ { "power11", OPTION_MASK_POWER11, false, true },
{ "hard-dfp", OPTION_MASK_DFP, false, true },
{ "htm", OPTION_MASK_HTM, false, true },
{ "isel", OPTION_MASK_ISEL, false, true },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 2291fe8d3a34..8957946bf948 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -107,6 +107,7 @@
to the assembler if -mpower9-vector was also used. */
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
+ mcpu=power11: -mpower11; \
mcpu=power10: -mpower10; \
mcpu=power9: -mpower9; \
mcpu=power8|mcpu=powerpc64le: %{mpower9-vector: -mpower9;: -mpower8}; \
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 60b923f5e4b3..662d0e681710 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -581,6 +581,9 @@ Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save
mpower10
Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
+mpower11
+Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) Warn(%qs should not be used)
+
mprefixed
Target Mask(PREFIXED) Var(rs6000_isa_flags)
Generate (do not generate) prefixed memory instructions.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 278c931b6a3b..5b5939a274e6 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -30996,8 +30996,8 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},
@samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},
@samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
@samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
-@samp{power9}, @samp{power10}, @samp{powerpc}, @samp{powerpc64},
-@samp{powerpc64le}, @samp{rs64}, and @samp{native}.
+@samp{power9}, @samp{power10}, @samp{power11}, @samp{powerpc},
+@samp{powerpc64}, @samp{powerpc64le}, @samp{rs64}, and @samp{native}.
@option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
@option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
diff --git a/gcc/testsuite/gcc.target/powerpc/power11-1.c b/gcc/testsuite/gcc.target/powerpc/power11-1.c
new file mode 100644
index 000000000000..6a2e802eedf3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/power11-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-require-effective-target power11_ok } */
+/* { dg-options "-mdejagnu-cpu=power11 -O2" } */
+
+/* Basic check to see if the compiler supports -mcpu=power11. */
+
+#ifndef _ARCH_PWR11
+#error "-mcpu=power11 is not supported"
+#endif
+
+void foo (void)
+{
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/power11-2.c b/gcc/testsuite/gcc.target/powerpc/power11-2.c
new file mode 100644
index 000000000000..7b9904c1d294
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/power11-2.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-require-effective-target power11_ok } */
+/* { dg-options "-O2" } */
+
+/* Check if we can set the power11 target via a target attribute. */
+
+__attribute__((__target__("cpu=power9")))
+void foo_p9 (void)
+{
+}
+
+__attribute__((__target__("cpu=power10")))
+void foo_p10 (void)
+{
+}
+
+__attribute__((__target__("cpu=power11")))
+void foo_p11 (void)
+{
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/power11-3.c b/gcc/testsuite/gcc.target/powerpc/power11-3.c
new file mode 100644
index 000000000000..f221a70d3b30
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/power11-3.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-require-effective-target power11_ok } */
+/* { dg-options "-mdejagnu=power8 -O2" } */
+
+/* Check if we can set the power11 target via a target_clones attribute. */
+
+__attribute__((__target_clones__("cpu=power11,cpu=power9,default")))
+void foo (void)
+{
+}
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 73360cd3a0d5..45d1f01af108 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -7149,6 +7149,23 @@ proc check_effective_target_power10_ok { } {
}
}
+# Return 1 if this is a PowerPC target supporting -mcpu=power11.
+
+proc check_effective_target_power11_ok { } {
+ if { ([istarget powerpc64*-*-linux*]) } {
+ return [check_no_compiler_messages power11_ok object {
+ int main (void) {
+ #ifndef _ARCH_PWR11
+ #error "-mcpu=power11 is not supported"
+ #endif
+ return 0;
+ }
+ } "-mcpu=power11"]
+ } else {
+ return 0
+ }
+}
+
# Return 1 if this is a PowerPC target supporting -mfloat128 via either
# software emulation on power7/power8 systems or hardware support on power9.
next reply other threads:[~2024-01-31 19:31 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-31 19:31 Michael Meissner [this message]
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2024-01-31 5:35 Michael Meissner
2024-01-26 0:21 Michael Meissner
2024-01-25 18:54 Michael Meissner
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