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From: H.J. Lu <hjl@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r14-8803] x86-64: Update gcc.target/i386/apx-ndd.c
Date: Mon, 5 Feb 2024 12:54:08 +0000 (GMT) [thread overview]
Message-ID: <20240205125408.B67153858CDA@sourceware.org> (raw)
https://gcc.gnu.org/g:e5f50e63a83d03d1db6be1578070041ac7f31c37
commit r14-8803-ge5f50e63a83d03d1db6be1578070041ac7f31c37
Author: H.J. Lu <(no_default)>
Date: Mon Feb 5 03:46:50 2024 -0800
x86-64: Update gcc.target/i386/apx-ndd.c
Fix the following issues:
1. Replace long with int64_t to support x32.
2. Replace \\(%rdi\\) with \\(%(?:r|e)di\\) for memory operand since x32
uses (%edi).
3. Replace %(?:|r|e)al with %al in negb scan.
* gcc.target/i386/apx-ndd.c: Updated.
Diff:
---
gcc/testsuite/gcc.target/i386/apx-ndd.c | 68 ++++++++++++++++-----------------
1 file changed, 34 insertions(+), 34 deletions(-)
diff --git a/gcc/testsuite/gcc.target/i386/apx-ndd.c b/gcc/testsuite/gcc.target/i386/apx-ndd.c
index b215f66d3e24..0eb751ad2253 100644
--- a/gcc/testsuite/gcc.target/i386/apx-ndd.c
+++ b/gcc/testsuite/gcc.target/i386/apx-ndd.c
@@ -75,9 +75,9 @@ FOO2 (short, add, +)
FOO (int, add, +)
FOO1 (int, add, +)
FOO2 (int, add, +)
-FOO (long, add, +)
-FOO1 (long, add, +)
-FOO2 (long, add, +)
+FOO (int64_t, add, +)
+FOO1 (int64_t, add, +)
+FOO2 (int64_t, add, +)
FOO (char, sub, -)
FOO1 (char, sub, -)
@@ -85,8 +85,8 @@ FOO (short, sub, -)
FOO1 (short, sub, -)
FOO (int, sub, -)
FOO1 (int, sub, -)
-FOO (long, sub, -)
-FOO1 (long, sub, -)
+FOO (int64_t, sub, -)
+FOO1 (int64_t, sub, -)
F (char, neg, -)
F1 (char, neg, -)
@@ -94,8 +94,8 @@ F (short, neg, -)
F1 (short, neg, -)
F (int, neg, -)
F1 (int, neg, -)
-F (long, neg, -)
-F1 (long, neg, -)
+F (int64_t, neg, -)
+F1 (int64_t, neg, -)
F (char, not, ~)
F1 (char, not, ~)
@@ -103,8 +103,8 @@ F (short, not, ~)
F1 (short, not, ~)
F (int, not, ~)
F1 (int, not, ~)
-F (long, not, ~)
-F1 (long, not, ~)
+F (int64_t, not, ~)
+F1 (int64_t, not, ~)
FOO (char, and, &)
FOO1 (char, and, &)
@@ -112,8 +112,8 @@ FOO (short, and, &)
FOO1 (short, and, &)
FOO (int, and, &)
FOO1 (int, and, &)
-FOO (long, and, &)
-FOO1 (long, and, &)
+FOO (int64_t, and, &)
+FOO1 (int64_t, and, &)
FOO (char, or, |)
FOO1 (char, or, |)
@@ -121,8 +121,8 @@ FOO (short, or, |)
FOO1 (short, or, |)
FOO (int, or, |)
FOO1 (int, or, |)
-FOO (long, or, |)
-FOO1 (long, or, |)
+FOO (int64_t, or, |)
+FOO1 (int64_t, or, |)
FOO (char, xor, ^)
FOO1 (char, xor, ^)
@@ -130,8 +130,8 @@ FOO (short, xor, ^)
FOO1 (short, xor, ^)
FOO (int, xor, ^)
FOO1 (int, xor, ^)
-FOO (long, xor, ^)
-FOO1 (long, xor, ^)
+FOO (int64_t, xor, ^)
+FOO1 (int64_t, xor, ^)
FOO (char, shl, <<)
FOO3 (char, shl, <<, 7)
@@ -139,8 +139,8 @@ FOO (short, shl, <<)
FOO3 (short, shl, <<, 7)
FOO (int, shl, <<)
FOO3 (int, shl, <<, 7)
-FOO (long, shl, <<)
-FOO3 (long, shl, <<, 7)
+FOO (int64_t, shl, <<)
+FOO3 (int64_t, shl, <<, 7)
FOO (char, sar, >>)
FOO3 (char, sar, >>, 7)
@@ -148,8 +148,8 @@ FOO (short, sar, >>)
FOO3 (short, sar, >>, 7)
FOO (int, sar, >>)
FOO3 (int, sar, >>, 7)
-FOO (long, sar, >>)
-FOO3 (long, sar, >>, 7)
+FOO (int64_t, sar, >>)
+FOO3 (int64_t, sar, >>, 7)
FOO (uint8_t, shr, >>)
FOO3 (uint8_t, shr, >>, 7)
@@ -170,33 +170,33 @@ FOO4 (uint16_t, rol, <<, >>, 1)
FOO4 (uint32_t, rol, <<, >>, 1)
FOO4 (uint64_t, rol, <<, >>, 1)
-/* { dg-final { scan-assembler-times "add(?:b|l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */
+/* { dg-final { scan-assembler-times "add(?:b|l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */
/* { dg-final { scan-assembler-times "lea(?:l|q)\[^\n\r]\\(%r(?:d|s)i,%r(?:d|s)i\\), %(?:|r|e)ax" 4 } } */
-/* { dg-final { scan-assembler-times "add(?:b|l|w|q)\[^\n\r]%(?:|r|e)si(?:|l), \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */
-/* { dg-final { scan-assembler-times "sub(?:b|l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */
+/* { dg-final { scan-assembler-times "add(?:b|l|w|q)\[^\n\r]%(?:|r|e)si(?:|l), \\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */
+/* { dg-final { scan-assembler-times "sub(?:b|l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */
/* { dg-final { scan-assembler-times "sub(?:b|l|w|q)\[^\n\r]%(?:|r|e)si(?:|l), %(?:|r|e)di, %(?:|r|e)a(?:x|l)" 4 } } */
-/* { dg-final { scan-assembler-times "negb\[^\n\r]\\(%rdi\\), %(?:|r|e)al" 1 } } */
-/* { dg-final { scan-assembler-times "neg(?:l|w|q)\[^\n\r]\\(%rdi\\), %(?:|r|e)ax" 3 } } */
+/* { dg-final { scan-assembler-times "negb\[^\n\r]\\(%(?:r|e)di\\), %al" 1 } } */
+/* { dg-final { scan-assembler-times "neg(?:l|w|q)\[^\n\r]\\(%(?:r|e)di\\), %(?:|r|e)ax" 3 } } */
/* { dg-final { scan-assembler-times "neg(?:l|w|q)\[^\n\r]%(?:|r|e)di, %(?:|r|e)ax" 4 } } */
-/* { dg-final { scan-assembler-times "not(?:b|l|w|q)\[^\n\r]\\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */
+/* { dg-final { scan-assembler-times "not(?:b|l|w|q)\[^\n\r]\\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */
/* { dg-final { scan-assembler-times "not(?:l|w|q)\[^\n\r]%(?:|r|e)di, %(?:|r|e)ax" 4 } } */
-/* { dg-final { scan-assembler-times "andb\[^\n\r]*1, \\(%rdi\\), %al" 1 } } */
-/* { dg-final { scan-assembler-times "and(?:l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)ax" 3 } } */
+/* { dg-final { scan-assembler-times "andb\[^\n\r]*1, \\(%(?:r|e)di\\), %al" 1 } } */
+/* { dg-final { scan-assembler-times "and(?:l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)ax" 3 } } */
/* { dg-final { scan-assembler-times "and(?:l|w|q)\[^\n\r]%(?:|r|e)di, %(?:|r|e)si, %(?:|r|e)ax" 2 } } */
/* { dg-final { scan-assembler-times "and(?:l|w|q)\[^\n\r]%(?:|r|e)si, %(?:|r|e)di, %(?:|r|e)ax" 2 } } */
-/* { dg-final { scan-assembler-times "orb\[^\n\r]*1, \\(%rdi\\), %al" 2} } */
-/* { dg-final { scan-assembler-times "or(?:l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)ax" 6 } } */
+/* { dg-final { scan-assembler-times "orb\[^\n\r]*1, \\(%(?:r|e)di\\), %al" 2} } */
+/* { dg-final { scan-assembler-times "or(?:l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)ax" 6 } } */
/* { dg-final { scan-assembler-times "or(?:l|w|q)\[^\n\r]%(?:|r|e)di, %(?:|r|e)si, %(?:|r|e)ax" 4 } } */
/* { dg-final { scan-assembler-times "or(?:l|w|q)\[^\n\r]%(?:|r|e)si, %(?:|r|e)di, %(?:|r|e)ax" 4 } } */
-/* { dg-final { scan-assembler-times "xorb\[^\n\r]*1, \\(%rdi\\), %al" 1 } } */
-/* { dg-final { scan-assembler-times "xor(?:l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)ax" 3 } } */
+/* { dg-final { scan-assembler-times "xorb\[^\n\r]*1, \\(%(?:r|e)di\\), %al" 1 } } */
+/* { dg-final { scan-assembler-times "xor(?:l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)ax" 3 } } */
/* { dg-final { scan-assembler-times "xor(?:l|w|q)\[^\n\r]%(?:|r|e)di, %(?:|r|e)si, %(?:|r|e)ax" 2 } } */
/* { dg-final { scan-assembler-times "xor(?:l|w|q)\[^\n\r]%(?:|r|e)si, %(?:|r|e)di, %(?:|r|e)ax" 2 } } */
-/* { dg-final { scan-assembler-times "sal(?:b|l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */
+/* { dg-final { scan-assembler-times "sal(?:b|l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */
/* { dg-final { scan-assembler-times "sal(?:l|w|q)\[^\n\r]*7, %(?:|r|e)di, %(?:|r|e)ax" 4 } } */
-/* { dg-final { scan-assembler-times "sar(?:b|l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */
+/* { dg-final { scan-assembler-times "sar(?:b|l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */
/* { dg-final { scan-assembler-times "sar(?:b|l|w|q)\[^\n\r]*7, %(?:|r|e)di(?:|l), %(?:|r|e)a(?:x|l)" 4 } } */
-/* { dg-final { scan-assembler-times "shr(?:b|l|w|q)\[^\n\r]*1, \\(%rdi\\), %(?:|r|e)a(?:x|l)" 4 } } */
+/* { dg-final { scan-assembler-times "shr(?:b|l|w|q)\[^\n\r]*1, \\(%(?:r|e)di\\), %(?:|r|e)a(?:x|l)" 4 } } */
/* { dg-final { scan-assembler-times "shr(?:b|l|w|q)\[^\n\r]*7, %(?:|r|e)di(?:|l), %(?:|r|e)a(?:x|l)" 4 } } */
/* { dg-final { scan-assembler-times "ror(?:b|l|w|q)\[^\n\r]*1, %(?:|r|e)di(?:|l), %(?:|r|e)a(?:x|l)" 4 } } */
/* { dg-final { scan-assembler-times "rol(?:b|l|w|q)\[^\n\r]*1, %(?:|r|e)di(?:|l), %(?:|r|e)a(?:x|l)" 4 } } */
reply other threads:[~2024-02-05 12:54 UTC|newest]
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