From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id BF84B3858404; Fri, 9 Feb 2024 19:11:43 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BF84B3858404 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1707505903; bh=kk/BoBXuX/7rVBrXF3yjkrOG9jga0NhdFh/oVLHKJEQ=; h=From:To:Subject:Date:From; b=oueoRhjeozjD1+nArG1i6XrJb1WZ1Sk4CQsWN4mTVYqZG/kfl5pi4mP4XpLQKEvYM SlcyI5DLXhmVP0WcP8/6OrJjl/K6d784D/CG3KjfJC0OzLxx4EDXMqWWjG9uaJhIp6 H27oGDK3YPRJFFVGvamzAICXkyNQJVApk50LGpv8= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work157-dmf)] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work157-dmf X-Git-Oldrev: 3a2db0da9be4a72c13c37b485c1b99b7a81871dd X-Git-Newrev: 442aeba67b9fedfe0e98623a06f82b1d2c1572d0 Message-Id: <20240209191143.BF84B3858404@sourceware.org> Date: Fri, 9 Feb 2024 19:11:43 +0000 (GMT) List-Id: https://gcc.gnu.org/g:442aeba67b9fedfe0e98623a06f82b1d2c1572d0 commit 442aeba67b9fedfe0e98623a06f82b1d2c1572d0 Author: Michael Meissner Date: Tue Feb 6 02:20:57 2024 -0500 PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair. This patch re-enables generating load and store vector pair instructions when doing certain memory copy operations when -mcpu=future is used. During power10 development, it was determined that using store vector pair instructions were problematical in a few cases, so we disabled generating load and store vector pair instructions for memory options by default. This patch re-enables generating these instructions if -mcpu=future is used. The patches have been tested on both little and big endian systems. Can I check it into the master branch? 2024-02-06 Michael Meissner gcc/ * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS): Add OPTION_MASK_BLOCK_OPS_VECTOR_PAIR. (POWERPC_MASKS): Likewise. Diff: --- gcc/config/rs6000/rs6000-cpus.def | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index a47075f8249e..ed934e0213e5 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -90,6 +90,7 @@ /* Flags for a potential future processor that may or may not be delivered. */ #define ISA_FUTURE_MASKS_SERVER (ISA_3_1_MASKS_SERVER \ + | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \ | OPTION_MASK_FUTURE) /* Flags that need to be turned off if -mno-power9-vector. */ @@ -127,6 +128,7 @@ /* Mask of all options to set the default isa flags based on -mcpu=. */ #define POWERPC_MASKS (OPTION_MASK_ALTIVEC \ + | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \ | OPTION_MASK_CMPB \ | OPTION_MASK_CRYPTO \ | OPTION_MASK_DFP \