[gcc(refs/users/meissner/heads/work158-future)] Add initial -mcpu=future support.

[Michael Meissner <meissner@gcc.gnu.org>]

https://gcc.gnu.org/g:33fcefe3faf6df2e7921bafcd8d45ad8c69629df

commit 33fcefe3faf6df2e7921bafcd8d45ad8c69629df
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Feb 9 19:47:27 2024 -0500

    Add initial -mcpu=future support.
    
    2024-02-09  Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): New option
            bits for -mcpu=future.
            (POWERPC_MASKS): Add -mfuture mask.
            (future cpu): Add -mcpu=future.
            * config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): New processor type.
            * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Likewise.
            * config/rs6000/rs6000.md (cpu attribute): Likewise.
            * config/rs6000/rs6000.opt (-mfuture): New insert mask for -mcpu=future.
            * doc/invoke.texi (PowerPC options): Add -mcpu=future.

Diff:
---
 gcc/config/rs6000/rs6000-cpus.def   | 6 ++++++
 gcc/config/rs6000/rs6000-opts.h     | 1 +
 gcc/config/rs6000/rs6000-tables.opt | 3 +++
 gcc/config/rs6000/rs6000.md         | 2 +-
 gcc/config/rs6000/rs6000.opt        | 4 ++++
 gcc/doc/invoke.texi                 | 2 +-
 6 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index d28cc87eb2a1..a47075f8249e 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -88,6 +88,10 @@
 				 | OPTION_MASK_POWER10			\
 				 | OTHER_POWER10_MASKS)
 
+/* Flags for a potential future processor that may or may not be delivered.  */
+#define ISA_FUTURE_MASKS_SERVER	(ISA_3_1_MASKS_SERVER			\
+				 | OPTION_MASK_FUTURE)
+
 /* Flags that need to be turned off if -mno-power9-vector.  */
 #define OTHER_P9_VECTOR_MASKS	(OPTION_MASK_FLOAT128_HW		\
 				 | OPTION_MASK_P9_MINMAX)
@@ -135,6 +139,7 @@
 				 | OPTION_MASK_LOAD_VECTOR_PAIR		\
 				 | OPTION_MASK_POWER10			\
 				 | OPTION_MASK_P10_FUSION		\
+				 | OPTION_MASK_FUTURE			\
 				 | OPTION_MASK_HTM			\
 				 | OPTION_MASK_ISEL			\
 				 | OPTION_MASK_MFCRF			\
@@ -267,3 +272,4 @@ RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT
 RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64
 	    | ISA_2_7_MASKS_SERVER | OPTION_MASK_HTM)
 RS6000_CPU ("rs64", PROCESSOR_RS64A, OPTION_MASK_PPC_GFXOPT | MASK_POWERPC64)
+RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64 | ISA_FUTURE_MASKS_SERVER)
diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h
index 33fd0efc936f..b2ae180c0f05 100644
--- a/gcc/config/rs6000/rs6000-opts.h
+++ b/gcc/config/rs6000/rs6000-opts.h
@@ -62,6 +62,7 @@ enum processor_type
    PROCESSOR_POWER8,
    PROCESSOR_POWER9,
    PROCESSOR_POWER10,
+   PROCESSOR_FUTURE,
 
    PROCESSOR_RS64A,
    PROCESSOR_MPCCORE,
diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt
index 65f46709716f..97fa98a2e65e 100644
--- a/gcc/config/rs6000/rs6000-tables.opt
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -197,3 +197,6 @@ Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(55)
 EnumValue
 Enum(rs6000_cpu_opt_value) String(rs64) Value(56)
 
+EnumValue
+Enum(rs6000_cpu_opt_value) String(future) Value(57)
+
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 4acb4031ae08..bd0ecdd90070 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -350,7 +350,7 @@
    ppc750,ppc7400,ppc7450,
    ppc403,ppc405,ppc440,ppc476,
    ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,
-   power4,power5,power6,power7,power8,power9,power10,
+   power4,power5,power6,power7,power8,power9,power10,future,
    rs64a,mpccore,cell,ppca2,titan"
   (const (symbol_ref "(enum attr_cpu) rs6000_tune")))
 
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 60b923f5e4b3..4ad1d8e302c0 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -612,6 +612,10 @@ mrop-protect
 Target Var(rs6000_rop_protect) Init(0)
 Enable instructions that guard against return-oriented programming attacks.
 
+mfuture
+Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use %<-mfuture>)
+Generate (do not generate) store vector pair instructions.
+
 mprivileged
 Target Var(rs6000_privileged) Init(0)
 Generate code that will run in privileged state.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 71339b8b30fa..dcc9f82171c8 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -31091,7 +31091,7 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},
 @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
 @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
 @samp{power9}, @samp{power10}, @samp{powerpc}, @samp{powerpc64},
-@samp{powerpc64le}, @samp{rs64}, and @samp{native}.
+@samp{powerpc64le}, @samp{rs64}, @samp{future}, and @samp{native}.
 
 @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
 @option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either