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From: Michael Meissner <meissner@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work159)] Use vector pair load/store for memcpy with -mcpu=future Date: Wed, 21 Feb 2024 19:01:18 +0000 (GMT) [thread overview] Message-ID: <20240221190118.A4B153858CD1@sourceware.org> (raw) https://gcc.gnu.org/g:9568aba72b1e0d757ec62e91f3cefd0d6fbe98d7 commit 9568aba72b1e0d757ec62e91f3cefd0d6fbe98d7 Author: Michael Meissner <meissner@linux.ibm.com> Date: Wed Feb 21 13:46:01 2024 -0500 Use vector pair load/store for memcpy with -mcpu=future In the development for the power10 processor, GCC did not enable using the load vector pair and store vector pair instructions when optimizing things like memory copy. This patch enables using those instructions if -mcpu=future is used. 2024-02-21 Michael Meissner <meissner@linux.ibm.com> gcc/ * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using load vector pair and store vector pair instructions for memory copy operations. (POWERPC_MASKS): Make the bit for enabling using load vector pair and store vector pair operations set and reset when the PowerPC processor is changed. Diff: --- gcc/config/rs6000/rs6000-cpus.def | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 01de96bc2498..a3b1b93f2d50 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -92,6 +92,7 @@ /* Flags for a potential future processor that may or may not be made. */ #define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \ + | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \ | OPTION_MASK_FUTURE) /* Flags that need to be turned off if -mno-power9-vector. */ @@ -129,6 +130,7 @@ /* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */ #define POWERPC_MASKS (OPTION_MASK_ALTIVEC \ + | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \ | OPTION_MASK_CMPB \ | OPTION_MASK_CRYPTO \ | OPTION_MASK_DFP \
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