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From: Tamar Christina <tnfchris@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-9137] AArch64: update vget_set_lane_1.c test output Date: Thu, 22 Feb 2024 15:32:30 +0000 (GMT) [thread overview] Message-ID: <20240222153230.6F17D3858D1E@sourceware.org> (raw) https://gcc.gnu.org/g:7d8585c0c0e5934780281abdee256ae6553e56e8 commit r14-9137-g7d8585c0c0e5934780281abdee256ae6553e56e8 Author: Tamar Christina <tamar.christina@arm.com> Date: Thu Feb 22 15:32:08 2024 +0000 AArch64: update vget_set_lane_1.c test output In the vget_set_lane_1.c test the following entries now generate a zip1 instead of an INS BUILD_TEST (float32x2_t, float32x2_t, , , f32, 1, 0) BUILD_TEST (int32x2_t, int32x2_t, , , s32, 1, 0) BUILD_TEST (uint32x2_t, uint32x2_t, , , u32, 1, 0) This is because the non-Q variant for indices 0 and 1 are just shuffling values. There is no perf difference between INS SIMD to SIMD and ZIP on Arm uArches but preferring the INS alternative has a drawback on all uArches as ZIP being a three operand instruction can be used to tie the result to the return register whereas INS would require an fmov. As such just update the test file for now. gcc/testsuite/ChangeLog: PR target/112375 * gcc.target/aarch64/vget_set_lane_1.c: Update test output. Diff: --- gcc/testsuite/gcc.target/aarch64/vget_set_lane_1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/aarch64/vget_set_lane_1.c b/gcc/testsuite/gcc.target/aarch64/vget_set_lane_1.c index 07a77de31920..a3978f68e4ff 100644 --- a/gcc/testsuite/gcc.target/aarch64/vget_set_lane_1.c +++ b/gcc/testsuite/gcc.target/aarch64/vget_set_lane_1.c @@ -22,7 +22,7 @@ BUILD_TEST (uint16x4_t, uint16x4_t, , , u16, 3, 2) BUILD_TEST (float32x2_t, float32x2_t, , , f32, 1, 0) BUILD_TEST (int32x2_t, int32x2_t, , , s32, 1, 0) BUILD_TEST (uint32x2_t, uint32x2_t, , , u32, 1, 0) -/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[1\\\], v1.s\\\[0\\\]" 3 } } */ +/* { dg-final { scan-assembler-times "zip1\\tv0.2s, v0.2s, v1.2s" 3 } } */ BUILD_TEST (poly8x8_t, poly8x16_t, , q, p8, 7, 15) BUILD_TEST (int8x8_t, int8x16_t, , q, s8, 7, 15)
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