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* [gcc(refs/users/meissner/heads/work161)] Add -mcpu=future support.
@ 2024-02-29 18:02 Michael Meissner
0 siblings, 0 replies; 2+ messages in thread
From: Michael Meissner @ 2024-02-29 18:02 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:b1b7057a045877a2cb7bed0894eba6f3803e5cf5
commit b1b7057a045877a2cb7bed0894eba6f3803e5cf5
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Feb 29 13:01:21 2024 -0500
Add -mcpu=future support.
This patch adds support for -mcpu=future. At the current time, no new
instructions are implemented. The tuning for the future processor is exactly
the same as for power10.
If -mcpu=future is used, the macro _ARCH_PWR_FUTURE will be defined.
In order to use -mcpu=future, you will need an assembler that supports the
-mfuture option.
2024-02-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config.gcc (powerpc*-*-*, rs6000-*-*): Add support for a potential
future processor.
* config/rs6000/aix71.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
_ARCH_PWR_FUTURE if -mcpu=future.
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): New macro.
(POWERPC_MASKS): Add support for -mcpu=future.
(future cpu): Add future cpu.
* config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): New macro.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/rs6000.cc (rs6000_machine_from_flags): If -mcpu=future,
emit .machine future.
(rs6000_opt_masks): Add support for the future ISA bits.
* config/rs6000/rs6000.h (ASM_CPU_SPEC): Add support for the future
processor.
* config/rs6000/rs6000.opt (-mfuture): New internal ISA bit for a
potential future cpu.
* doc/invoke.texi (PowerPC options): Document -mcpu=future.
Diff:
---
gcc/config.gcc | 4 ++--
gcc/config/rs6000/aix71.h | 1 +
gcc/config/rs6000/aix72.h | 1 +
gcc/config/rs6000/aix73.h | 1 +
gcc/config/rs6000/rs6000-c.cc | 2 ++
gcc/config/rs6000/rs6000-cpus.def | 6 ++++++
gcc/config/rs6000/rs6000-opts.h | 4 ++++
gcc/config/rs6000/rs6000-tables.opt | 3 +++
gcc/config/rs6000/rs6000.cc | 3 +++
gcc/config/rs6000/rs6000.h | 1 +
gcc/config/rs6000/rs6000.opt | 3 +++
gcc/doc/invoke.texi | 2 +-
12 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index fb2358c3de9..6b0af2e1a51 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -532,7 +532,7 @@ powerpc*-*-*)
extra_headers="${extra_headers} amo.h"
case x$with_cpu in
xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|\
- xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
+ xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500|xfuture)
cpu_is_64bit=yes
;;
esac
@@ -5557,7 +5557,7 @@ case "${target}" in
;;
"" | common | native \
| power[3456789] | power1[01] | power5+ | power6x \
- | powerpc | powerpc64 | powerpc64le \
+ | powerpc | powerpc64 | powerpc64le | future \
| rs64 \
| 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
| 476 | 476fp | 505 | 601 | 602 | 603 | 603e | ec603e \
diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 41037b3852d..570ddcc451d 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,6 +79,7 @@ do { \
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
+ mcpu=future: -mfuture; \
mcpu=power11: -mpwr11; \
mcpu=power10: -mpwr10; \
mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index fe59f8319b4..242ca94bd06 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,6 +79,7 @@ do { \
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
+ mcpu=future: -mfuture; \
mcpu=power11: -mpwr11; \
mcpu=power10: -mpwr10; \
mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index 1318b0b3662..2bd6b4bb3c4 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,6 +79,7 @@ do { \
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
+ mcpu=future: -mfuture; \
mcpu=power11: -mpwr11; \
mcpu=power10: -mpwr10; \
mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index ebed8b9554a..d15bb85743c 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -449,6 +449,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
if ((flags & OPTION_MASK_POWER11) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
+ if ((flags & OPTION_MASK_FUTURE) != 0)
+ rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR_FUTURE");
if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index a5b2dd49670..77170915615 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -90,6 +90,10 @@
#define ISA_POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER \
| OPTION_MASK_POWER11)
+/* Flags for a potential future processor that may or may not be made. */
+#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_FUTURE)
+
/* Flags that need to be turned off if -mno-vsx. */
#define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX \
| OPTION_MASK_FLOAT128_KEYWORD \
@@ -131,6 +135,7 @@
| OPTION_MASK_POWER10 \
| OPTION_MASK_POWER11 \
| OPTION_MASK_P10_FUSION \
+ | OPTION_MASK_FUTURE \
| OPTION_MASK_HTM \
| OPTION_MASK_ISEL \
| OPTION_MASK_MFCRF \
@@ -263,3 +268,4 @@ RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64
| ISA_2_7_MASKS_SERVER | OPTION_MASK_HTM)
RS6000_CPU ("rs64", PROCESSOR_RS64A, OPTION_MASK_PPC_GFXOPT | MASK_POWERPC64)
RS6000_CPU ("power11", PROCESSOR_POWER11, MASK_POWERPC64 | ISA_POWER11_MASKS_SERVER)
+RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64 | ISA_FUTURE_MASKS_SERVER)
diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h
index a6f099d40a3..8d71a104f2a 100644
--- a/gcc/config/rs6000/rs6000-opts.h
+++ b/gcc/config/rs6000/rs6000-opts.h
@@ -74,6 +74,10 @@ enum processor_type
-mtune=power11 use the same instruction tuning as power10. */
#define PROCESSOR_POWER11 PROCESSOR_POWER10
+/* Until there are changes in instruction tuning for a potential future cpu,
+ make -mtune=future use the same instruction tuning as power11. */
+#define PROCESSOR_FUTURE PROCESSOR_POWER11
+
/* Types of costly dependences. */
enum rs6000_dependence_cost
{
diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt
index 7e5bb6e7658..f009c4e5718 100644
--- a/gcc/config/rs6000/rs6000-tables.opt
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -200,3 +200,6 @@ Enum(rs6000_cpu_opt_value) String(rs64) Value(56)
EnumValue
Enum(rs6000_cpu_opt_value) String(power11) Value(57)
+EnumValue
+Enum(rs6000_cpu_opt_value) String(future) Value(58)
+
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index e47e7de83bd..e3ca4e799e4 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -5880,6 +5880,8 @@ rs6000_machine_from_flags (void)
/* Disable the flags that should never influence the .machine selection. */
flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL);
+ if ((flags & OPTION_MASK_FUTURE) != 0)
+ return "future";
if ((flags & OPTION_MASK_POWER11) != 0)
return "power11";
if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
@@ -24438,6 +24440,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
{ "float128", OPTION_MASK_FLOAT128_KEYWORD, false, true },
{ "float128-hardware", OPTION_MASK_FLOAT128_HW, false, true },
{ "fprnd", OPTION_MASK_FPRND, false, true },
+ { "future", OPTION_MASK_FUTURE, false, false },
{ "power10", OPTION_MASK_POWER10, false, true },
{ "hard-dfp", OPTION_MASK_DFP, false, true },
{ "htm", OPTION_MASK_HTM, false, true },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 407cb379a0c..79ce1a8cbf1 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -106,6 +106,7 @@
you make changes here, make them also there. */
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
+ mcpu=future: -mfuture; \
mcpu=power11: -mpower11; \
mcpu=power10: -mpower10; \
mcpu=power9: -mpower9; \
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 9146c3582af..8e46b8fbabb 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -607,6 +607,9 @@ Enable instructions that guard against return-oriented programming attacks.
mpower11
Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) Warn(Do not use %<-mpower11>)
+mfuture
+Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use %<-mfuture>)
+
mprivileged
Target Var(rs6000_privileged) Init(0)
Generate code that will run in privileged state.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index d549ff003a2..866aa36b5f7 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -31134,7 +31134,7 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},
@samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
@samp{power9}, @samp{power10}, @samp{power11},
@samp{powerpc}, @samp{powerpc64}, @samp{powerpc64le},
-@samp{rs64}, and @samp{native}.
+@samp{rs64}, @samp{future}, and @samp{native}.
@option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
@option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
^ permalink raw reply [flat|nested] 2+ messages in thread
* [gcc(refs/users/meissner/heads/work161)] Add -mcpu=future support.
@ 2024-02-29 7:10 Michael Meissner
0 siblings, 0 replies; 2+ messages in thread
From: Michael Meissner @ 2024-02-29 7:10 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:0f40394a0f9441f34be32ea2a0b976b55fa10f7d
commit 0f40394a0f9441f34be32ea2a0b976b55fa10f7d
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Feb 29 02:04:33 2024 -0500
Add -mcpu=future support.
This patch adds support for -mcpu=future. At the current time, no new
instructions are implemented. The tuning for the future processor is exactly
the same as for power10.
If -mcpu=future is used, the macro _ARCH_PWR_FUTURE will be defined.
In order to use -mcpu=future, you will need an assembler that supports the
-mfuture option.
2024-02-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config.gcc (powerpc*-*-*, rs6000-*-*): Add support for a potential
future processor.
* config/rs6000/aix71.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
_ARCH_PWR_FUTURE if -mcpu=future.
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): New macro.
(POWERPC_MASKS): Add support for -mcpu=future.
(future cpu): Add future cpu.
* config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): New macro.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/rs6000.cc (rs6000_machine_from_flags): If -mcpu=future,
emit .machine future.
(rs6000_opt_masks): Add support for the future ISA bits.
* config/rs6000/rs6000.h (ASM_CPU_SPEC): Add support for the future
processor.
* config/rs6000/rs6000.opt (-mfuture): New internal ISA bit for a
potential future cpu.
* doc/invoke.texi (PowerPC options): Document -mcpu=future.
Diff:
---
gcc/config.gcc | 4 ++--
gcc/config/rs6000/aix71.h | 1 +
gcc/config/rs6000/aix72.h | 1 +
gcc/config/rs6000/aix73.h | 1 +
gcc/config/rs6000/rs6000-c.cc | 2 ++
gcc/config/rs6000/rs6000-cpus.def | 6 ++++++
gcc/config/rs6000/rs6000-opts.h | 5 +++--
gcc/config/rs6000/rs6000-tables.opt | 3 +++
gcc/config/rs6000/rs6000.cc | 3 +++
gcc/config/rs6000/rs6000.h | 1 +
gcc/config/rs6000/rs6000.opt | 3 +++
gcc/doc/invoke.texi | 2 +-
12 files changed, 27 insertions(+), 5 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index fb2358c3de9..6b0af2e1a51 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -532,7 +532,7 @@ powerpc*-*-*)
extra_headers="${extra_headers} amo.h"
case x$with_cpu in
xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|\
- xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
+ xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500|xfuture)
cpu_is_64bit=yes
;;
esac
@@ -5557,7 +5557,7 @@ case "${target}" in
;;
"" | common | native \
| power[3456789] | power1[01] | power5+ | power6x \
- | powerpc | powerpc64 | powerpc64le \
+ | powerpc | powerpc64 | powerpc64le | future \
| rs64 \
| 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
| 476 | 476fp | 505 | 601 | 602 | 603 | 603e | ec603e \
diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 41037b3852d..570ddcc451d 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,6 +79,7 @@ do { \
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
+ mcpu=future: -mfuture; \
mcpu=power11: -mpwr11; \
mcpu=power10: -mpwr10; \
mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index fe59f8319b4..242ca94bd06 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,6 +79,7 @@ do { \
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
+ mcpu=future: -mfuture; \
mcpu=power11: -mpwr11; \
mcpu=power10: -mpwr10; \
mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index 1318b0b3662..2bd6b4bb3c4 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,6 +79,7 @@ do { \
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
+ mcpu=future: -mfuture; \
mcpu=power11: -mpwr11; \
mcpu=power10: -mpwr10; \
mcpu=power9: -mpwr9; \
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index ebed8b9554a..d15bb85743c 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -449,6 +449,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
if ((flags & OPTION_MASK_POWER11) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
+ if ((flags & OPTION_MASK_FUTURE) != 0)
+ rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR_FUTURE");
if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index a5b2dd49670..77170915615 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -90,6 +90,10 @@
#define ISA_POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER \
| OPTION_MASK_POWER11)
+/* Flags for a potential future processor that may or may not be made. */
+#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_FUTURE)
+
/* Flags that need to be turned off if -mno-vsx. */
#define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX \
| OPTION_MASK_FLOAT128_KEYWORD \
@@ -131,6 +135,7 @@
| OPTION_MASK_POWER10 \
| OPTION_MASK_POWER11 \
| OPTION_MASK_P10_FUSION \
+ | OPTION_MASK_FUTURE \
| OPTION_MASK_HTM \
| OPTION_MASK_ISEL \
| OPTION_MASK_MFCRF \
@@ -263,3 +268,4 @@ RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64
| ISA_2_7_MASKS_SERVER | OPTION_MASK_HTM)
RS6000_CPU ("rs64", PROCESSOR_RS64A, OPTION_MASK_PPC_GFXOPT | MASK_POWERPC64)
RS6000_CPU ("power11", PROCESSOR_POWER11, MASK_POWERPC64 | ISA_POWER11_MASKS_SERVER)
+RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64 | ISA_FUTURE_MASKS_SERVER)
diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h
index f7150032f71..a1cffe634d1 100644
--- a/gcc/config/rs6000/rs6000-opts.h
+++ b/gcc/config/rs6000/rs6000-opts.h
@@ -70,9 +70,10 @@ enum processor_type
PROCESSOR_TITAN
};
-/* Until there are changes in instruction tuning for power11, treat power11 to
- use power10 tuning. */
+/* Until there are changes in instruction tuning for either power11 or a
+ possible future cpu, treat them to use power10 tuning. */
#define PROCESSOR_POWER11 PROCESSOR_POWER10
+#define PROCESSOR_FUTURE PROCESSOR_POWER10
/* Types of costly dependences. */
enum rs6000_dependence_cost
diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt
index 7e5bb6e7658..f009c4e5718 100644
--- a/gcc/config/rs6000/rs6000-tables.opt
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -200,3 +200,6 @@ Enum(rs6000_cpu_opt_value) String(rs64) Value(56)
EnumValue
Enum(rs6000_cpu_opt_value) String(power11) Value(57)
+EnumValue
+Enum(rs6000_cpu_opt_value) String(future) Value(58)
+
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index e47e7de83bd..e3ca4e799e4 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -5880,6 +5880,8 @@ rs6000_machine_from_flags (void)
/* Disable the flags that should never influence the .machine selection. */
flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL);
+ if ((flags & OPTION_MASK_FUTURE) != 0)
+ return "future";
if ((flags & OPTION_MASK_POWER11) != 0)
return "power11";
if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
@@ -24438,6 +24440,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
{ "float128", OPTION_MASK_FLOAT128_KEYWORD, false, true },
{ "float128-hardware", OPTION_MASK_FLOAT128_HW, false, true },
{ "fprnd", OPTION_MASK_FPRND, false, true },
+ { "future", OPTION_MASK_FUTURE, false, false },
{ "power10", OPTION_MASK_POWER10, false, true },
{ "hard-dfp", OPTION_MASK_DFP, false, true },
{ "htm", OPTION_MASK_HTM, false, true },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 407cb379a0c..79ce1a8cbf1 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -106,6 +106,7 @@
you make changes here, make them also there. */
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
+ mcpu=future: -mfuture; \
mcpu=power11: -mpower11; \
mcpu=power10: -mpower10; \
mcpu=power9: -mpower9; \
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 9146c3582af..8e46b8fbabb 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -607,6 +607,9 @@ Enable instructions that guard against return-oriented programming attacks.
mpower11
Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) Warn(Do not use %<-mpower11>)
+mfuture
+Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use %<-mfuture>)
+
mprivileged
Target Var(rs6000_privileged) Init(0)
Generate code that will run in privileged state.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index d549ff003a2..866aa36b5f7 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -31134,7 +31134,7 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},
@samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
@samp{power9}, @samp{power10}, @samp{power11},
@samp{powerpc}, @samp{powerpc64}, @samp{powerpc64le},
-@samp{rs64}, and @samp{native}.
+@samp{rs64}, @samp{future}, and @samp{native}.
@option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
@option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
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