From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2153) id 382253858D33; Mon, 4 Mar 2024 09:04:57 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 382253858D33 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1709543097; bh=PIbZs07ZxVLztkauMJ6PFnHTkhu8d6thvW4ghzN5/XU=; h=From:To:Subject:Date:From; b=LQQ0Hew8VXukq/ErcuBh1DiI5kbsBionKi8GixDomRQXlr97NSUszbEC55P4dxvZP UFYtTQx2+EEv6+qH56aF5PhPAuUYO35yb9ECRmd0C2Z4LmADzm4WYkvhp0kc0+RaaA oth2WfX0lHrFmDaXOJvJwGsz717G47mcxt6mT0Gw= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Jakub Jelinek To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-9289] i386: Fix ICEs with SUBREGs from vector etc. constants to XFmode [PR114184] X-Act-Checkin: gcc X-Git-Author: Jakub Jelinek X-Git-Refname: refs/heads/master X-Git-Oldrev: 1835933a1c1ad2b756b30f2c4f8e5cde057689a0 X-Git-Newrev: ea1c16f95b8fbaba4a7f3663ff9933ebedfb92a5 Message-Id: <20240304090457.382253858D33@sourceware.org> Date: Mon, 4 Mar 2024 09:04:57 +0000 (GMT) List-Id: https://gcc.gnu.org/g:ea1c16f95b8fbaba4a7f3663ff9933ebedfb92a5 commit r14-9289-gea1c16f95b8fbaba4a7f3663ff9933ebedfb92a5 Author: Jakub Jelinek Date: Mon Mar 4 10:04:19 2024 +0100 i386: Fix ICEs with SUBREGs from vector etc. constants to XFmode [PR114184] The Intel extended format has the various weird number categories, pseudo denormals, pseudo infinities, pseudo NaNs and unnormals. Those are not representable in the GCC real_value and so neither GIMPLE nor RTX VIEW_CONVERT_EXPR/SUBREG folding folds those into constants. As can be seen on the following testcase, because it isn't folded (since GCC 12, before that we were folding it) we can end up with a SUBREG of a CONST_VECTOR or similar constant, which isn't valid general_operand, so we ICE during vregs pass trying to recognize the move instruction. Initially I thought it is a middle-end bug, the movxf instruction has general_operand predicate, but the middle-end certainly never tests that predicate, seems moves are special optabs. And looking at other mov optabs, e.g. for vector modes the i386 patterns use nonimmediate_operand predicate on the input, yet ix86_expand_vector_move deals with CONSTANT_P and SUBREG of CONSTANT_P arguments which if the predicate was checked couldn't ever make it through. The following patch handles this case similarly to the ix86_expand_vector_move's SUBREG of CONSTANT_P case, does it just for XFmode because I believe that is the only mode that needs it from the scalar ones, others should just be folded. 2024-03-04 Jakub Jelinek PR target/114184 * config/i386/i386-expand.cc (ix86_expand_move): If XFmode op1 is SUBREG of CONSTANT_P, force the SUBREG_REG into memory or register. * gcc.target/i386/pr114184.c: New test. Diff: --- gcc/config/i386/i386-expand.cc | 14 ++++++++++++++ gcc/testsuite/gcc.target/i386/pr114184.c | 22 ++++++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index c98e0f81f0c..3b1685ae448 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -451,6 +451,20 @@ ix86_expand_move (machine_mode mode, rtx operands[]) && GET_MODE (SUBREG_REG (op1)) == DImode && SUBREG_BYTE (op1) == 0) op1 = gen_rtx_ZERO_EXTEND (TImode, SUBREG_REG (op1)); + /* As not all values in XFmode are representable in real_value, + we might be called with unfoldable SUBREGs of constants. */ + if (mode == XFmode + && CONSTANT_P (SUBREG_REG (op1)) + && can_create_pseudo_p ()) + { + machine_mode imode = GET_MODE (SUBREG_REG (op1)); + rtx r = force_const_mem (imode, SUBREG_REG (op1)); + if (r) + r = validize_mem (r); + else + r = force_reg (imode, SUBREG_REG (op1)); + op1 = simplify_gen_subreg (mode, r, imode, SUBREG_BYTE (op1)); + } break; } diff --git a/gcc/testsuite/gcc.target/i386/pr114184.c b/gcc/testsuite/gcc.target/i386/pr114184.c new file mode 100644 index 00000000000..360b3b95026 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr114184.c @@ -0,0 +1,22 @@ +/* PR target/114184 */ +/* { dg-do compile } */ +/* { dg-options "-Og -mavx2" } */ + +typedef unsigned char V __attribute__((vector_size (32))); +typedef unsigned char W __attribute__((vector_size (16))); + +_Complex long double +foo (void) +{ + _Complex long double d; + *(V *)&d = (V) { 149, 136, 89, 42, 38, 240, 196, 194 }; + return d; +} + +long double +bar (void) +{ + long double d; + *(W *)&d = (W) { 149, 136, 89, 42, 38, 240, 196, 194 }; + return d; +}