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* [gcc r14-9421] Daily bump.
@ 2024-03-11 0:17 GCC Administrator
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From: GCC Administrator @ 2024-03-11 0:17 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:1a4553bc253fc0141e5f41ac15a2320f650c9e7c
commit r14-9421-g1a4553bc253fc0141e5f41ac15a2320f650c9e7c
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Mon Mar 11 00:16:47 2024 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 26 ++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/d/ChangeLog | 7 +++++++
gcc/testsuite/ChangeLog | 30 ++++++++++++++++++++++++++++++
4 files changed, 64 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3ac5f039c4b..33b52868564 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,29 @@
+2024-03-10 jlaw <jeffreyalaw@gmail.com>
+
+ PR tree-optimization/110199
+ * tree-ssa-scopedtables.cc
+ (avail_exprs_stack::simplify_binary_operation): Generalize handling
+ of MIN_EXPR/MAX_EXPR to allow additional simplifications. Canonicalize
+ comparison operands for other cases.
+
+2024-03-10 Pan Li <pan2.li@intel.com>
+
+ * tree-vect-stmts.cc (vectorizable_store): Enable the assert
+ during transform process.
+ (vectorizable_load): Ditto.
+
+2024-03-10 jlaw <jeffreyalaw@gmail.com>
+
+ PR target/102250
+ * doc/install.texi: Document need for python when building
+ RISC-V compilers.
+
+2024-03-10 jlaw <jeffreyalaw@gmail.com>
+
+ PR target/111362
+ * mode-switching.cc (optimize_mode_switching): Only process
+ NONDEBUG insns.
+
2024-03-09 Georg-Johann Lay <avr@gjlay.de>
* config/avr/avr.md: Fix typos in comment, indentation glitches
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index a187030afad..7fe29887d3c 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240310
+20240311
diff --git a/gcc/d/ChangeLog b/gcc/d/ChangeLog
index 595bb5993c4..843a3b7fb57 100644
--- a/gcc/d/ChangeLog
+++ b/gcc/d/ChangeLog
@@ -1,3 +1,10 @@
+2024-03-10 Iain Buclaw <ibuclaw@gdcproject.org>
+
+ PR d/112285
+ PR d/112290
+ * d-target.cc (Target::preferPassByRef): Return true for all static
+ array and struct types.
+
2024-03-03 Iain Buclaw <ibuclaw@gdcproject.org>
* dmd/MERGE: Merge upstream dmd f8bae04558.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 14867898c05..6baee43bc1d 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,33 @@
+2024-03-10 Iain Buclaw <ibuclaw@gdcproject.org>
+
+ PR d/112285
+ PR d/112290
+ * gdc.dg/pr112285.d: New test.
+ * gdc.dg/pr112290.d: New test.
+
+2024-03-10 jlaw <jeffreyalaw@gmail.com>
+
+ PR tree-optimization/110199
+ * gcc.dg/tree-ssa/minmax-27.c: New test.
+ * gcc.dg/tree-ssa/minmax-28.c: New test.
+
+2024-03-10 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/rvv/base/pr114195-1.c: New test.
+
+2024-03-10 jlaw <jeffreyalaw@gmail.com>
+
+ Revert:
+ 2024-01-22 Jeff Law <jlaw@ventanamicro.com>
+
+ * gcc.target/sh/pr59533-1.c: Adjust expected output.
+
+2024-03-10 jlaw <jeffreyalaw@gmail.com>
+
+ PR target/111362
+ * gcc.target/riscv/compare-debug-1.c: New test.
+ * gcc.target/riscv/compare-debug-2.c: New test.
+
2024-03-09 Xi Ruoyao <xry111@xry111.site>
* gcc.target/loongarch/tls-ie-relax.c: New test.
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