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* [gcc(refs/users/meissner/heads/work163-dmf)] Use vector pair load/store for memcpy with -mcpu=future
@ 2024-03-22 4:20 Michael Meissner
0 siblings, 0 replies; 4+ messages in thread
From: Michael Meissner @ 2024-03-22 4:20 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:e9f36e1c173a1967318ccfc2341e46b526d6f0aa
commit e9f36e1c173a1967318ccfc2341e46b526d6f0aa
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Mar 22 00:16:39 2024 -0400
Use vector pair load/store for memcpy with -mcpu=future
In the development for the power10 processor, GCC did not enable using the load
vector pair and store vector pair instructions when optimizing things like
memory copy. This patch enables using those instructions if -mcpu=future is
used.
2024-03-22 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using
load vector pair and store vector pair instructions for memory copy
operations.
(POWERPC_MASKS): Make the bit for enabling using load vector pair and
store vector pair operations set and reset when the PowerPC processor is
changed.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 47365534af8..4ddba142e44 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -90,6 +90,7 @@
| OPTION_MASK_POWER11)
#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-vsx. */
@@ -121,6 +122,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
^ permalink raw reply [flat|nested] 4+ messages in thread
* [gcc(refs/users/meissner/heads/work163-dmf)] Use vector pair load/store for memcpy with -mcpu=future
@ 2024-03-22 4:34 Michael Meissner
0 siblings, 0 replies; 4+ messages in thread
From: Michael Meissner @ 2024-03-22 4:34 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:385b09d7c32c2cb7a3d16f738e870d1d0bad6997
commit 385b09d7c32c2cb7a3d16f738e870d1d0bad6997
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Mar 22 00:22:20 2024 -0400
Use vector pair load/store for memcpy with -mcpu=future
In the development for the power10 processor, GCC did not enable using the load
vector pair and store vector pair instructions when optimizing things like
memory copy. This patch enables using those instructions if -mcpu=future is
used.
2024-03-22 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using
load vector pair and store vector pair instructions for memory copy
operations.
(POWERPC_MASKS): Make the bit for enabling using load vector pair and
store vector pair operations set and reset when the PowerPC processor is
changed.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 47365534af8..4ddba142e44 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -90,6 +90,7 @@
| OPTION_MASK_POWER11)
#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-vsx. */
@@ -121,6 +122,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
^ permalink raw reply [flat|nested] 4+ messages in thread
* [gcc(refs/users/meissner/heads/work163-dmf)] Use vector pair load/store for memcpy with -mcpu=future
@ 2024-03-20 4:11 Michael Meissner
0 siblings, 0 replies; 4+ messages in thread
From: Michael Meissner @ 2024-03-20 4:11 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:88cc50bad1cb1e15e719ebf000b87d9532fd29bd
commit 88cc50bad1cb1e15e719ebf000b87d9532fd29bd
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Mon Mar 18 22:58:56 2024 -0400
Use vector pair load/store for memcpy with -mcpu=future
In the development for the power10 processor, GCC did not enable using the load
vector pair and store vector pair instructions when optimizing things like
memory copy. This patch enables using those instructions if -mcpu=future is
used.
2024-03-18 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using
load vector pair and store vector pair instructions for memory copy
operations.
(POWERPC_MASKS): Make the bit for enabling using load vector pair and
store vector pair operations set and reset when the PowerPC processor is
changed.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 47365534af8..4ddba142e44 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -90,6 +90,7 @@
| OPTION_MASK_POWER11)
#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-vsx. */
@@ -121,6 +122,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
^ permalink raw reply [flat|nested] 4+ messages in thread
* [gcc(refs/users/meissner/heads/work163-dmf)] Use vector pair load/store for memcpy with -mcpu=future
@ 2024-03-19 5:08 Michael Meissner
0 siblings, 0 replies; 4+ messages in thread
From: Michael Meissner @ 2024-03-19 5:08 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:615936cbdb0e207b8629e84e1f86037ec956cba2
commit 615936cbdb0e207b8629e84e1f86037ec956cba2
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Mon Mar 18 22:58:56 2024 -0400
Use vector pair load/store for memcpy with -mcpu=future
In the development for the power10 processor, GCC did not enable using the load
vector pair and store vector pair instructions when optimizing things like
memory copy. This patch enables using those instructions if -mcpu=future is
used.
2024-03-18 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using
load vector pair and store vector pair instructions for memory copy
operations.
(POWERPC_MASKS): Make the bit for enabling using load vector pair and
store vector pair operations set and reset when the PowerPC processor is
changed.
Diff:
---
gcc/config/rs6000/rs6000-cpus.def | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 47365534af8..4ddba142e44 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -90,6 +90,7 @@
| OPTION_MASK_POWER11)
#define ISA_FUTURE_MASKS_SERVER (ISA_POWER11_MASKS_SERVER \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_FUTURE)
/* Flags that need to be turned off if -mno-vsx. */
@@ -121,6 +122,7 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
+ | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
^ permalink raw reply [flat|nested] 4+ messages in thread
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