[gcc(refs/users/meissner/heads/work164-bugs)] Revert all changes

[Michael Meissner <meissner@gcc.gnu.org>]

https://gcc.gnu.org/g:ad98381bc5234aacf9caf674b0c334c626fbf78b

commit ad98381bc5234aacf9caf674b0c334c626fbf78b
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Apr 9 17:37:42 2024 -0400

    Revert all changes

Diff:
---
 gcc/config/rs6000/fusion.md     | 15 ---------------
 gcc/config/rs6000/genfusion.pl  | 22 ----------------------
 gcc/config/rs6000/predicates.md |  9 ---------
 gcc/config/rs6000/rs6000.md     |  5 +----
 4 files changed, 1 insertion(+), 50 deletions(-)

diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 5feedf83cad..4ed9ae1d69f 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -3055,18 +3055,3 @@
   [(set_attr "type" "fused_vector")
    (set_attr "cost" "6")
    (set_attr "length" "8")])
-
-;; ori_oris and xori_xoris fusion patterns generated by gen_wide_immediate
-(define_insn "*fuse_<IORXOR_OP>i_<IORXOR_OP>is"
-  [(set (match_operand:DI 0 "gpc_reg_operand" "=&r")
-        (iorxor:DI
-          (match_operand:DI 1 "gpc_reg_operand" "r")
-          (match_operand:DI 2 "u32bit_cint_2_insns_operand" "n")))]
-  "(TARGET_P10_FUSION)"
-{
-  HOST_WIDE_INT value = INTVAL (operands[2]);
-  operands[3] = GEN_INT (value & 0xffff);
-  operands[4] = GEN_INT ((value >> 16) & 0xffff);
-  return "<IORXOR_OP>i %0,%1,%3\;<IORXOR_OP>is %0,%0,%4";
-}
-  [(set_attr "length" "8")])
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index b6f1016b830..2271be14bfa 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -367,28 +367,6 @@ EOF
   }
 }
 
-sub gen_wide_immediate
-{
-    print <<"EOF";
-
-;; ori_oris and xori_xoris fusion patterns generated by gen_wide_immediate
-(define_insn "*fuse_<IORXOR_OP>i_<IORXOR_OP>is"
-  [(set (match_operand:DI 0 "gpc_reg_operand" "=&r")
-        (iorxor:DI
-          (match_operand:DI 1 "gpc_reg_operand" "r")
-          (match_operand:DI 2 "u32bit_cint_2_insns_operand" "n")))]
-  "(TARGET_P10_FUSION)"
-{
-  HOST_WIDE_INT value = INTVAL (operands[2]);
-  operands[3] = GEN_INT (value & 0xffff);
-  operands[4] = GEN_INT ((value >> 16) & 0xffff);
-  return "<IORXOR_OP>i %0,%1,%3\\;<IORXOR_OP>is %0,%0,%4";
-}
-  [(set_attr "length" "8")])
-EOF
-}
-
 gen_ld_cmpi_p10();
 gen_logical_addsubf();
 gen_addadd;
-gen_wide_immediate();
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 83f368b2916..d23ce9a77a3 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -282,15 +282,6 @@
   (and (match_code "const_int")
        (match_test "(0x80000000 + UINTVAL (op)) >> 32 == 0")))
 
-;; Return 1 if op is a 32-bit unsigned constant where the upper 16-bits is
-;; non-zero along with the lower 16-bits that needs two instructions (ORI/ORIS
-;; or XORI/XORIS to do the operation).
-(define_predicate "u32bit_cint_2_insns_operand"
-  (and (match_code "const_int")
-       (match_test "(INTVAL (op) >> 32) == 0")
-       (match_test "(INTVAL (op) & 0xffff) != 0")
-       (match_test "(INTVAL (op) & 0xffff0000) != 0")))
-
 ;; Return 1 if op is a constant 32-bit unsigned
 (define_predicate "c32bit_cint_operand"
   (and (match_code "const_int")
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index f626b68ebb2..1acd34ca0ee 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -822,9 +822,6 @@
 				     (SF "TARGET_P8_VECTOR")
 				     (DI "TARGET_POWERPC64")])
 
-;; Convert iorxor iterator into or/xor instruction
-(define_code_attr IORXOR_OP [(ior "or") (xor "xor")])
-
 (include "darwin.md")
 \f
 ;; Start with fixed-point load and store insns.  Here we put only the more
@@ -3936,7 +3933,7 @@
   [(set (match_operand:GPR 0 "gpc_reg_operand")
 	(iorxor:GPR (match_operand:GPR 1 "gpc_reg_operand")
 		    (match_operand:GPR 2 "non_logical_cint_operand")))]
-  "<MODE>mode != DImode || !TARGET_P10_FUSION"
+  ""
   [(set (match_dup 3)
 	(iorxor:GPR (match_dup 1)
 		    (match_dup 4)))