From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1944) id CC64F3858401; Wed, 10 Apr 2024 10:48:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CC64F3858401 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1712746103; bh=1qVa2JWPhRW3d5lS9T4q91+wXefUhNJjLlhiu9ydRvk=; h=From:To:Subject:Date:From; b=LjzDpDszhsYgJLccUSNS5+WBZQB6JWI6Ln6HyE03X0Wl+voTtCvWCVuR4D1gabn5r 3hSXWD5xZ8Jfh/UabPqXwHgh98Hto5JVWIBwxV/fPvsX50zRZyi4489gDb+a0j4zz0 feT72WYqSIx5mjwJxfVGS1KE3ufvMkLfpg2uA0BQ= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Szabolcs Nagy To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/vendors/ARM/heads/gcs)] aarch64: Add GCS instructions X-Act-Checkin: gcc X-Git-Author: Szabolcs Nagy X-Git-Refname: refs/vendors/ARM/heads/gcs X-Git-Oldrev: 0c0ee07e8b10e071c5b88fbae6f109778a4e578c X-Git-Newrev: 57aec9c418f837bf427d8317bebdc0f825cbb043 Message-Id: <20240410104823.CC64F3858401@sourceware.org> Date: Wed, 10 Apr 2024 10:48:23 +0000 (GMT) List-Id: https://gcc.gnu.org/g:57aec9c418f837bf427d8317bebdc0f825cbb043 commit 57aec9c418f837bf427d8317bebdc0f825cbb043 Author: Szabolcs Nagy Date: Tue May 9 16:00:01 2023 +0100 aarch64: Add GCS instructions Add instructions for the Guarded Control Stack extension. GCSSS1 and GCSSS2 are modelled as a single GCSSS unspec, because they are always used together in the compiler. Before GCSPOPM and GCSSS2 an extra "mov xn, 0" is added to clear the output register, this is needed to get reasonable result when GCS is disabled, when the instructions are NOPs. Since the instructions are expecetd to be used behind runtime feature checks, this is mainly relevant if GCS can be disabled asynchronously. The output of GCSPOPM is usually not needed, so a separate gcspopm_xzr was added to model that. Did not do the same for GCSSS as it is a less common operation. The used mnemonics do not depend on updated assembler since these instructions can be used without new -march setting behind a runtime check. Reading the GCSPR is modelled as unspec_volatile so it does not get reordered wrt the other instructions changing the GCSPR. TODO: - Do we care about async disable? - Do we need GCSSS_xzr? (to avoid the mov x,0) gcc/ChangeLog: * config/aarch64/aarch64.md (aarch64_load_gcspr): New. (aarch64_gcspopm): New. (aarch64_gcspopm_xzr): New. (aarch64_gcsss): New. Diff: --- gcc/config/aarch64/aarch64.md | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index a20462303b5..8defd6e0582 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -379,6 +379,9 @@ UNSPECV_BTI_J ; Represent BTI j. UNSPECV_BTI_JC ; Represent BTI jc. UNSPECV_CHKFEAT ; Represent CHKFEAT X16. + UNSPECV_GCSPR ; Represent MRS Xn, GCSPR_EL0 + UNSPECV_GCSPOPM ; Represent GCSPOPM. + UNSPECV_GCSSS ; Represent GCSSS1 and GCSSS2. UNSPECV_TSTART ; Represent transaction start. UNSPECV_TCOMMIT ; Represent transaction commit. UNSPECV_TCANCEL ; Represent transaction cancel. @@ -8267,6 +8270,38 @@ "hint\\t40 // chkfeat x16" ) +;; Guarded Control Stack (GCS) instructions +(define_insn "aarch64_load_gcspr" + [(set (match_operand:DI 0 "register_operand" "=r") + (unspec_volatile:DI [(const_int 0)] UNSPECV_GCSPR))] + "" + "mrs\\t%0, s3_3_c2_c5_1 // gcspr_el0" + [(set_attr "type" "mrs")] +) + +(define_insn "aarch64_gcspopm" + [(set (match_operand:DI 0 "register_operand" "=r") + (unspec_volatile:DI [(const_int 0)] UNSPECV_GCSPOPM))] + "" + "mov\\t%0, 0\;sysl\\t%0, #3, c7, c7, #1 // gcspopm" + [(set_attr "length" "8")] +) + +(define_insn "aarch64_gcspopm_xzr" + [(unspec_volatile [(const_int 0)] UNSPECV_GCSPOPM)] + "" + "sysl\\txzr, #3, c7, c7, #1 // gcspopm" +) + +(define_insn "aarch64_gcsss" + [(set (match_operand:DI 0 "register_operand" "=r") + (unspec_volatile:DI [(match_operand:DI 1 "register_operand" "r")] + UNSPECV_GCSSS))] + "" + "sys\\t#3, c7, c7, #2, %1 // gcsss1\;mov\\t%0, 0\;sysl\\t%0, #3, c7, c7, #3 // gcsss2" + [(set_attr "length" "12")] +) + ;; AdvSIMD Stuff (include "aarch64-simd.md")