From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7888) id 922383861001; Wed, 24 Apr 2024 07:21:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 922383861001 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1713943310; bh=Be9HJn+r8LcWxBGUTqDD9QY02TSpJ5jQzrfGi+++fYQ=; h=From:To:Subject:Date:From; b=ioemJEfAQ0ImLPKHfBZnRH4Aya4CTdKjWSDb1PICV+LDnzbFXbj/drSLylDoekv0D TL97h7t2cF5iXikcRxD28B1QFUT7U8KQd2OVp1ldQ1S3PZbVmQYmIcsB1VXgdKgvZh kO9LR9MMiqHUXaQvDUXevv4rAniZ2cfMvfN2WYi0= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Haochen Jiang To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-10104] i386: Fix behavior for both using AVX10.1-256 in options and function attribute X-Act-Checkin: gcc X-Git-Author: Haochen Jiang X-Git-Refname: refs/heads/master X-Git-Oldrev: f952745943c2e9fbb2df32d2f2b037669d3fc50f X-Git-Newrev: d279c9d89b2f6ce89c1eec0ff4b980e9c5f51fd1 Message-Id: <20240424072150.922383861001@sourceware.org> Date: Wed, 24 Apr 2024 07:21:50 +0000 (GMT) List-Id: https://gcc.gnu.org/g:d279c9d89b2f6ce89c1eec0ff4b980e9c5f51fd1 commit r14-10104-gd279c9d89b2f6ce89c1eec0ff4b980e9c5f51fd1 Author: Haochen Jiang Date: Wed Apr 24 10:43:18 2024 +0800 i386: Fix behavior for both using AVX10.1-256 in options and function attribute When we are using -mavx10.1-256 in command line and avx10.1-256 in target attribute together, zmm should never be generated. But current GCC will generate zmm since it wrongly enables EVEX512 for non-explicitly set AVX512. This patch will fix that issue. gcc/ChangeLog: * config/i386/i386-options.cc (ix86_valid_target_attribute_tree): Check whether AVX512F is explicitly enabled. gcc/testsuite/ChangeLog: * gcc.target/i386/avx10_1-24.c: New test. Diff: --- gcc/config/i386/i386-options.cc | 1 + gcc/testsuite/gcc.target/i386/avx10_1-24.c | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc index 68a2e1c6910..ac48b5c61c4 100644 --- a/gcc/config/i386/i386-options.cc +++ b/gcc/config/i386/i386-options.cc @@ -1431,6 +1431,7 @@ ix86_valid_target_attribute_tree (tree fndecl, tree args, scenario. */ if ((def->x_ix86_isa_flags2 & OPTION_MASK_ISA2_AVX10_1_256) && (opts->x_ix86_isa_flags & OPTION_MASK_ISA_AVX512F) + && (opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_AVX512F) && !(def->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_EVEX512) && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA2_EVEX512)) opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_EVEX512; diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-24.c b/gcc/testsuite/gcc.target/i386/avx10_1-24.c new file mode 100644 index 00000000000..2e93f041760 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-24.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=x86-64 -mavx10.1" } */ +/* { dg-final { scan-assembler-not "%zmm" } } */ + +typedef float __m512 __attribute__ ((__vector_size__ (64), __may_alias__)); + +void __attribute__((target("avx10.1-256"))) callee256(__m512 *a, __m512 *b) { *a = *b; }