From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 5A9FE3858D20; Thu, 25 Apr 2024 23:39:09 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5A9FE3858D20 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1714088349; bh=kmNFqa4Sm53FiMpbACl7iWyeRo4G1EW5oek97WNNJMc=; h=From:To:Subject:Date:From; b=R5Kr0d2lKnjWfVShTq64zyCMviAE539Ww+q/qNoCNMHKOXDvKUnAb5LjYL8bUTv7+ qoIA03lK3X/xeqFo8YdBM4vHHn2+rG7DeKB9VxoyLvY2Nbsot12aq/Utz45s+2tvIJ nYjsfN6I1LHrnnIC4LTaCelee8qUILuHxVSqBP9g= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work164-test)] Make moves from SPRs higher in cost. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work164-test X-Git-Oldrev: b7c32f032d273335cf1f4e16c31754f23f7ba3ca X-Git-Newrev: eebc665799dc3cacf8c57f62863b489e07d6066d Message-Id: <20240425233909.5A9FE3858D20@sourceware.org> Date: Thu, 25 Apr 2024 23:39:09 +0000 (GMT) List-Id: https://gcc.gnu.org/g:eebc665799dc3cacf8c57f62863b489e07d6066d commit eebc665799dc3cacf8c57f62863b489e07d6066d Author: Michael Meissner Date: Thu Apr 25 19:38:52 2024 -0400 Make moves from SPRs higher in cost. 2024-04-25 Michael Meissner gcc/ * config/rs6000/rs6000.cc (rs6000_register_move_cost): Make moves from SPRs more expensive. Diff: --- gcc/config/rs6000/rs6000.cc | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 908ad5dcb58..e5ebbd58cc0 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -22813,6 +22813,16 @@ rs6000_register_move_cost (machine_mode mode, ret = 2 * hard_regno_nregs (reg, mode); } + /* Make moves from SPR registers (LR, CTR, TAR) more expensive so that the + register allocator does not think of these registers are useful for saving + results. */ + else if (reg_classes_intersect_p (from, SPECIAL_REGS) + && reg_classes_intersect_p (to, GENERAL_REGS)) + { + rclass = from; + ret = (hard_regno_nregs (LR_REGNO, mode) > 1) ? 32768 : 32; + } + /* Moves from/to GENERAL_REGS. */ else if ((rclass = from, reg_classes_intersect_p (to, GENERAL_REGS)) || (rclass = to, reg_classes_intersect_p (from, GENERAL_REGS)))