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From: Richard Ball <ricbal02@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r12-10397] aarch64: Fix SCHEDULER_IDENT for Cortex-A510
Date: Fri, 26 Apr 2024 17:22:10 +0000 (GMT)	[thread overview]
Message-ID: <20240426172210.AB56C3858C42@sourceware.org> (raw)

https://gcc.gnu.org/g:751a0f54345b7e037db7f0389c19c1f87e0ae4de

commit r12-10397-g751a0f54345b7e037db7f0389c19c1f87e0ae4de
Author: Richard Ball <richard.ball@arm.com>
Date:   Fri Apr 26 18:21:07 2024 +0100

    aarch64: Fix SCHEDULER_IDENT for Cortex-A510
    
    The SCHEDULER_IDENT for this CPU was incorrectly
    set to cortexa55. This can cause
    sub-optimal asm to be generated.
    
    gcc/ChangeLog:
            PR target/114272
            * config/aarch64/aarch64-cores.def (AARCH64_CORE):
            Change SCHEDULER_IDENT from cortexa55 to cortexa53
            for Cortex-A510.

Diff:
---
 gcc/config/aarch64/aarch64-cores.def | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index 30b5591f1a3..956afa70714 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -164,7 +164,7 @@ AARCH64_CORE("cortex-r82", cortexr82, cortexa53, 8R, AARCH64_FL_FOR_ARCH8_R, cor
 /* Armv9.0-A Architecture Processors.  */
 
 /* Arm ('A') cores. */
-AARCH64_CORE("cortex-a510",  cortexa510, cortexa55, 9A,  AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG
+AARCH64_CORE("cortex-a510",  cortexa510, cortexa53, 9A,  AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG
  | AARCH64_FL_I8MM | AARCH64_FL_BF16, cortexa53, 0x41, 0xd46, -1)
 
 AARCH64_CORE("cortex-a710",  cortexa710, cortexa57, 9A,  AARCH64_FL_FOR_ARCH9 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_MEMTAG | AARCH64_FL_I8MM | AARCH64_FL_BF16, neoversen2, 0x41, 0xd47, -1)

                 reply	other threads:[~2024-04-26 17:22 UTC|newest]

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