From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2140) id C09C43858D34; Sun, 28 Apr 2024 07:41:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C09C43858D34 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1714290116; bh=NXod64SJwqXUXmN3SvqTwdatdeiIvovJnNOw4cdxbDE=; h=From:To:Subject:Date:From; b=hrQBoLKyjcObkFZNjCWRr9FvbYMNbxr/86DdbVn507T9XtGzpV/vl22gCQBAUluer HvOhkXBFw6elGsFXS/wtvlxYLBbRVtyMvYxpZkqLV414YHR17az3i8mfgQbtkY7L2k cmElpPVSzsXbs9D/HslMGRy54Muk96u3AqPGDKRI= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Alexandre Oliva To: gcc-cvs@gcc.gnu.org Subject: [gcc r15-15] decay vect tests from run to link for pr95401 X-Act-Checkin: gcc X-Git-Author: Alexandre Oliva X-Git-Refname: refs/heads/master X-Git-Oldrev: 83bc41e8364360b63eaa59c88e2fb499a6751233 X-Git-Newrev: 05d83334d5bbeae01d71080f1da524810d6740d9 Message-Id: <20240428074156.C09C43858D34@sourceware.org> Date: Sun, 28 Apr 2024 07:41:56 +0000 (GMT) List-Id: https://gcc.gnu.org/g:05d83334d5bbeae01d71080f1da524810d6740d9 commit r15-15-g05d83334d5bbeae01d71080f1da524810d6740d9 Author: Alexandre Oliva Date: Sun Apr 28 04:29:54 2024 -0300 decay vect tests from run to link for pr95401 When vect.exp finds our configuration disables altivec by default, it disables the execution of vectorization tests, assuming the test hardware doesn't support it. Tests become just compile tests, but compile tests won't work correctly when additional sources are named, e.g. pr95401.cc, because GCC refuses to compile multiple files into the same asm output. With this patch, the default for when execution is not possible becomes link. for gcc/testsuite/ChangeLog * lib/target-supports.exp (check_vect_support_and_set_flags): Decay to link rather than compile. Diff: --- gcc/testsuite/lib/target-supports.exp | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 3a55b2a4159..182d80129de 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -11625,7 +11625,7 @@ proc check_vect_support_and_set_flags { } { if [check_750cl_hw_available] { set dg-do-what-default run } else { - set dg-do-what-default compile + set dg-do-what-default link } } elseif [istarget powerpc*-*-*] { # Skip targets not supporting -maltivec. @@ -11655,14 +11655,14 @@ proc check_vect_support_and_set_flags { } { # some other cpu type specified above. set DEFAULT_VECTCFLAGS [linsert $DEFAULT_VECTCFLAGS 0 "-mcpu=970"] } - set dg-do-what-default compile + set dg-do-what-default link } } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } { lappend DEFAULT_VECTCFLAGS "-msse2" if { [check_effective_target_sse2_runtime] } { set dg-do-what-default run } else { - set dg-do-what-default compile + set dg-do-what-default link } } elseif { [istarget mips*-*-*] && [check_effective_target_nomips16] } { @@ -11681,7 +11681,7 @@ proc check_vect_support_and_set_flags { } { if [check_effective_target_ultrasparc_hw] { set dg-do-what-default run } else { - set dg-do-what-default compile + set dg-do-what-default link } } elseif [istarget alpha*-*-*] { # Alpha's vectorization capabilities are extremely limited. @@ -11694,7 +11694,7 @@ proc check_vect_support_and_set_flags { } { if [check_alpha_max_hw_available] { set dg-do-what-default run } else { - set dg-do-what-default compile + set dg-do-what-default link } } elseif [istarget ia64-*-*] { set dg-do-what-default run @@ -11707,7 +11707,7 @@ proc check_vect_support_and_set_flags { } { if [is-effective-target arm_neon_hw] { set dg-do-what-default run } else { - set dg-do-what-default compile + set dg-do-what-default link } } elseif [istarget aarch64*-*-*] { set dg-do-what-default run @@ -11731,7 +11731,7 @@ proc check_vect_support_and_set_flags { } { set dg-do-what-default run } else { lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch" - set dg-do-what-default compile + set dg-do-what-default link } } elseif [istarget amdgcn-*-*] { set dg-do-what-default run @@ -11742,7 +11742,7 @@ proc check_vect_support_and_set_flags { } { foreach item [add_options_for_riscv_v ""] { lappend DEFAULT_VECTCFLAGS $item } - set dg-do-what-default compile + set dg-do-what-default link } } elseif [istarget loongarch*-*-*] { # Set the default vectorization option to "-mlsx" due to the problem @@ -11751,7 +11751,7 @@ proc check_vect_support_and_set_flags { } { if [check_effective_target_loongarch_sx_hw] { set dg-do-what-default run } else { - set dg-do-what-default compile + set dg-do-what-default link } } else { return 0