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* [gcc r15-44] RISC-V: Fix parsing of Zic* extensions
@ 2024-04-29 7:08 Christoph Mテシllner
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From: Christoph Mテシllner @ 2024-04-29 7:08 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:285300eb928b171236e895f28c960ad02dcb0d67
commit r15-44-g285300eb928b171236e895f28c960ad02dcb0d67
Author: Christoph Müllner <christoph.muellner@vrull.eu>
Date: Mon Apr 29 00:46:06 2024 +0200
RISC-V: Fix parsing of Zic* extensions
The extension parsing table entries for a range of Zic* extensions
does not match the mask definition in riscv.opt.
This results in broken TARGET_ZIC* macros, because the values of
riscv_zi_subext and riscv_zicmo_subext are set wrong.
This patch fixes this by moving Zic64b into riscv_zicmo_subext
and all other affected Zic* extensions to riscv_zi_subext.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc: Move ziccamoa, ziccif,
zicclsm, and ziccrse into riscv_zi_subext.
* config/riscv/riscv.opt: Define MASK_ZIC64B for
riscv_ziccmo_subext.
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 8 ++++----
gcc/config/riscv/riscv.opt | 4 ++--
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 43b7549e3ec..8cc0e727737 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -1638,15 +1638,15 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
{"zihintntl", &gcc_options::x_riscv_zi_subext, MASK_ZIHINTNTL},
{"zihintpause", &gcc_options::x_riscv_zi_subext, MASK_ZIHINTPAUSE},
+ {"ziccamoa", &gcc_options::x_riscv_zi_subext, MASK_ZICCAMOA},
+ {"ziccif", &gcc_options::x_riscv_zi_subext, MASK_ZICCIF},
+ {"zicclsm", &gcc_options::x_riscv_zi_subext, MASK_ZICCLSM},
+ {"ziccrse", &gcc_options::x_riscv_zi_subext, MASK_ZICCRSE},
{"zicboz", &gcc_options::x_riscv_zicmo_subext, MASK_ZICBOZ},
{"zicbom", &gcc_options::x_riscv_zicmo_subext, MASK_ZICBOM},
{"zicbop", &gcc_options::x_riscv_zicmo_subext, MASK_ZICBOP},
{"zic64b", &gcc_options::x_riscv_zicmo_subext, MASK_ZIC64B},
- {"ziccamoa", &gcc_options::x_riscv_zicmo_subext, MASK_ZICCAMOA},
- {"ziccif", &gcc_options::x_riscv_zicmo_subext, MASK_ZICCIF},
- {"zicclsm", &gcc_options::x_riscv_zicmo_subext, MASK_ZICCLSM},
- {"ziccrse", &gcc_options::x_riscv_zicmo_subext, MASK_ZICCRSE},
{"zve32x", &gcc_options::x_target_flags, MASK_VECTOR},
{"zve32f", &gcc_options::x_target_flags, MASK_VECTOR},
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index b14888e9816..ee824756381 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -237,8 +237,6 @@ Mask(ZIHINTPAUSE) Var(riscv_zi_subext)
Mask(ZICOND) Var(riscv_zi_subext)
-Mask(ZIC64B) Var(riscv_zi_subext)
-
Mask(ZICCAMOA) Var(riscv_zi_subext)
Mask(ZICCIF) Var(riscv_zi_subext)
@@ -390,6 +388,8 @@ Mask(ZICBOM) Var(riscv_zicmo_subext)
Mask(ZICBOP) Var(riscv_zicmo_subext)
+Mask(ZIC64B) Var(riscv_zicmo_subext)
+
TargetVariable
int riscv_zf_subext
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