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From: GCC Administrator <gccadmin@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r15-701] Daily bump.
Date: Tue, 21 May 2024 00:17:47 +0000 (GMT)	[thread overview]
Message-ID: <20240521001747.7D9593858D35@sourceware.org> (raw)

https://gcc.gnu.org/g:b666d86b41c85a1756bf43951661a03f670a6852

commit r15-701-gb666d86b41c85a1756bf43951661a03f670a6852
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Tue May 21 00:17:26 2024 +0000

    Daily bump.

Diff:
---
 ChangeLog               |   5 +
 gcc/ChangeLog           | 212 ++++++++++++++++++++++++++++
 gcc/DATESTAMP           |   2 +-
 gcc/ada/ChangeLog       | 369 ++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/fortran/ChangeLog   |  20 +++
 gcc/testsuite/ChangeLog | 117 +++++++++++++++
 6 files changed, 724 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index 703b3fbb18fc..262d1ebfc3cb 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2024-05-20  Gerald Pfeifer  <gerald@pfeifer.com>
+
+	* MAINTAINERS: Move Joern Rennecke from arc and epiphany maintainer
+	to Write After Approval.
+
 2024-05-17  Levy Hsu  <admin@levyhsu.com>
 
 	* MAINTAINERS: Add myself.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 07aad1886112..d379d8f4691f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,215 @@
+2024-05-20  Andrew Pinski  <quic_apinski@quicinc.com>
+
+	PR tree-optimization/115143
+	* tree-ssa-phiopt.cc (minmax_replacement): Check for empty
+	phi nodes for middle bbs for the case where middle bb is not empty.
+
+2024-05-20  Pengxuan Zheng  <quic_pzheng@quicinc.com>
+
+	PR target/102171
+	* config/aarch64/aarch64-builtins.cc (AARCH64_SIMD_VGET_LOW_BUILTINS):
+	New macro to create definitions for all vget_low intrinsics.
+	(VGET_LOW_BUILTIN): Likewise.
+	(enum aarch64_builtins): Add vget_low function codes.
+	(aarch64_general_fold_builtin): Fold vget_low calls.
+	* config/aarch64/aarch64-simd-builtins.def: Delete vget_low builtins.
+	* config/aarch64/aarch64-simd.md (aarch64_get_low<mode>): Delete.
+	(aarch64_vget_lo_halfv8bf): Likewise.
+	* config/aarch64/arm_neon.h (__attribute__): Delete.
+	(vget_low_f16): Likewise.
+	(vget_low_f32): Likewise.
+	(vget_low_f64): Likewise.
+	(vget_low_p8): Likewise.
+	(vget_low_p16): Likewise.
+	(vget_low_p64): Likewise.
+	(vget_low_s8): Likewise.
+	(vget_low_s16): Likewise.
+	(vget_low_s32): Likewise.
+	(vget_low_s64): Likewise.
+	(vget_low_u8): Likewise.
+	(vget_low_u16): Likewise.
+	(vget_low_u32): Likewise.
+	(vget_low_u64): Likewise.
+	(vget_low_bf16): Likewise.
+
+2024-05-20  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+
+	* config/aarch64/aarch64.cc (aarch64_rtx_costs): Improve CTZ costing.
+
+2024-05-20  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+
+	* config/aarch64/aarch64.md (movsi_aarch64): Use '\;' to force
+	newline in 2-instruction pattern.
+	(movdi_aarch64): Likewise.
+
+2024-05-20  Ajit Kumar Agarwal  <aagarwa1@linux.ibm.com>
+
+	* config/aarch64/aarch64-ldp-fusion.cc: Rename generic parts of code
+	to avoid "ldp" and "stp".
+
+2024-05-20  Mark Wielaard  <mark@klomp.org>
+
+	* config/riscv/riscv.opt.urls: Regenerate.
+	* config/i386/i386.opt.urls: Likewise.
+
+2024-05-20  Ajit Kumar Agarwal  <aagarwa1@linux.ibm.com>
+
+	* config/aarch64/aarch64-ldp-fusion.cc: Factor out a
+	target-independent interface and move it to the head of the file
+
+2024-05-20  YunQiang Su  <syq@gcc.gnu.org>
+
+	* config/mips/mips.cc(mips_option_override):
+	Drop mips_lra_flag variable;
+	(mips_lra_p): Removed.
+	(TARGET_LRA_P): Remove definition here to use the default one.
+	* config/mips/mips.md(*mul_acc_si, *mul_acc_si_r3900, *mul_sub_si):
+	Drop mips_lra_flag variable.
+	* config/mips/mips.opt(-mlra): Removed.
+	* config/mips/mips.opt.urls(mlra): Removed.
+
+2024-05-20  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* common/config/i386/cpuinfo.h
+	(get_intel_cpu): Remove Xeon Phi cpus.
+	(get_available_features): Remove Xeon Phi ISAs.
+	* common/config/i386/i386-common.cc
+	(OPTION_MASK_ISA_AVX512PF_SET): Removed.
+	(OPTION_MASK_ISA_AVX512ER_SET): Ditto.
+	(OPTION_MASK_ISA2_AVX5124FMAPS_SET): Ditto.
+	(OPTION_MASK_ISA2_AVX5124VNNIW_SET): Ditto.
+	(OPTION_MASK_ISA_PREFETCHWT1_SET): Ditto.
+	(OPTION_MASK_ISA_AVX512F_UNSET): Remove AVX512PF and AVX512ER.
+	(OPTION_MASK_ISA_AVX512PF_UNSET): Removed.
+	(OPTION_MASK_ISA_AVX512ER_UNSET): Ditto.
+	(OPTION_MASK_ISA2_AVX5124FMAPS_UNSET): Ditto.
+	(OPTION_MASK_ISA2_AVX5124VNNIW_UNSET): Ditto.
+	(OPTION_MASK_ISA_PREFETCHWT1_UNSET): Ditto.
+	(OPTION_MASK_ISA2_AVX512F_UNSET): Remove AVX5124FMAPS and
+	AVX5125VNNIW.
+	(ix86_handle_option): Remove Xeon Phi options.
+	(processor_names): Remove Xeon Phi cpus.
+	(processor_alias_table): Ditto.
+	* common/config/i386/i386-cpuinfo.h
+	(enum processor_types): Ditto.
+	(enum processor_features): Remove Xeon Phi ISAs.
+	* common/config/i386/i386-isas.h: Ditto.
+	* config.gcc: Remove Xeon Phi cpus and ISAs.
+	* config/i386/avx5124fmapsintrin.h: Remove intrin support.
+	* config/i386/avx5124vnniwintrin.h: Ditto.
+	* config/i386/avx512erintrin.h: Ditto.
+	* config/i386/avx512pfintrin.h: Ditto.
+	* config/i386/cpuid.h (bit_AVX512PF): Removed.
+	(bit_AVX512ER): Ditto.
+	(bit_PREFETCHWT1): Ditto.
+	(bit_AVX5124VNNIW): Ditto.
+	(bit_AVX5124FMAPS): Ditto.
+	* config/i386/driver-i386.cc
+	(host_detect_local_cpu): Remove Xeon Phi.
+	* config/i386/i386-builtin-types.def: Remove unused types.
+	* config/i386/i386-builtin.def (BDESC): Remove builtins.
+	* config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins): Ditto.
+	* config/i386/i386-c.cc (ix86_target_macros_internal): Remove Xeon
+	Phi cpus and ISAs.
+	* config/i386/i386-expand.cc (ix86_expand_builtin): Remove Xeon Phi
+	related handlers.
+	(ix86_emit_swdivsf): Ditto.
+	(ix86_emit_swsqrtsf): Ditto.
+	* config/i386/i386-isa.def: Remove Xeon Phi ISAs.
+	* config/i386/i386-options.cc (m_KNL): Removed.
+	(m_KNM): Ditto.
+	(isa2_opts): Remove Xeon Phi ISAs.
+	(isa_opts): Ditto.
+	(processor_cost_table): Remove Xeon Phi cpus.
+	(ix86_valid_target_attribute_inner_p): Remove Xeon Phi ISAs.
+	(ix86_option_override_internal): Remove Xeon Phi related handlers.
+	* config/i386/i386-rust.cc (ix86_rust_target_cpu_info): Remove Xeon
+	Phi ISAs.
+	* config/i386/i386.cc (ix86_hard_regno_mode_ok): Remove Xeon Phi
+	related handler.
+	* config/i386/i386.h (TARGET_EMIT_VZEROUPPER): Removed.
+	(enum processor_type): Remove Xeon Phi cpus.
+	* config/i386/i386.md (prefetch): Remove PREFETCHWT1.
+	(*prefetch_3dnow): Ditto.
+	(*prefetch_prefetchwt1): Removed.
+	* config/i386/i386.opt: Remove Xeon Phi ISAs.
+	* config/i386/immintrin.h: Ditto.
+	* config/i386/sse.md (VF1_AVX512ER_128_256): Removed.
+	(rsqrt<mode>2): Change iterator from VF1_AVX512ER_128_256 to
+	VF1_128_256.
+	(GATHER_SCATTER_SF_MEM_MODE): Removed.
+	(avx512pf_gatherpf<mode>sf): Ditto.
+	(*avx512pf_gatherpf<VI48_512:mode>sf_mask): Ditto.
+	(avx512pf_gatherpf<mode>df): Ditto.
+	(*avx512pf_gatherpf<VI4_256_8_512:mode>df_mask): Ditto.
+	(avx512pf_scatterpf<mode>sf): Ditto.
+	(*avx512pf_scatterpf<VI48_512:mode>sf_mask): Ditto.
+	(avx512pf_scatterpf<mode>df): Ditto.
+	(*avx512pf_scatterpf<VI4_256_8_512:mode>df_mask): Ditto.
+	(exp2<mode>2): Ditto.
+	(avx512er_exp2<mode><mask_name><round_saeonly_name>): Ditto.
+	(<mask_codefor>avx512er_rcp28<mode><mask_name><round_saeonly_name>):
+	Ditto.
+	(avx512er_vmrcp28<mode><mask_name><round_saeonly_name>): Ditto.
+	(<mask_codefor>avx512er_rsqrt28<mode><mask_name><round_saeonly_name>):
+	Ditto.
+	(avx512er_vmrsqrt28<mode><mask_name><round_saeonly_name>): Ditto.
+	(IMOD4): Ditto.
+	(imod4_narrow): Ditto.
+	(mov<mode>): Ditto.
+	(*mov<mode>_internal): Ditto.
+	(avx5124fmaddps_4fmaddps): Ditto.
+	(avx5124fmaddps_4fmaddps_mask): Ditto.
+	(avx5124fmaddps_4fmaddps_maskz): Ditto.
+	(avx5124fmaddps_4fmaddss): Ditto.
+	(avx5124fmaddps_4fmaddss_mask): Ditto.
+	(avx5124fmaddps_4fmaddss_maskz): Ditto.
+	(avx5124fmaddps_4fnmaddps): Ditto.
+	(avx5124fmaddps_4fnmaddps_mask): Ditto.
+	(avx5124fmaddps_4fnmaddps_maskz): Ditto.
+	(avx5124fmaddps_4fnmaddss): Ditto.
+	(avx5124fmaddps_4fnmaddss_mask): Ditto.
+	(avx5124fmaddps_4fnmaddss_maskz): Ditto.
+	(avx5124vnniw_vp4dpwssd): Ditto.
+	(avx5124vnniw_vp4dpwssd_mask): Ditto.
+	(avx5124vnniw_vp4dpwssd_maskz): Ditto.
+	(avx5124vnniw_vp4dpwssds): Ditto.
+	(avx5124vnniw_vp4dpwssds_mask): Ditto.
+	(avx5124vnniw_vp4dpwssds_maskz): Ditto.
+	* config/i386/x86-tune-sched.cc (ix86_issue_rate): Remove Xeon Phi cpus.
+	(ix86_adjust_cost): Ditto.
+	* config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Ditto.
+	(X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto.
+	(X86_TUNE_MOVX): Ditto.
+	(X86_TUNE_MEMORY_MISMATCH_STALL): Ditto.
+	(X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto.
+	(X86_TUNE_FOUR_JUMP_LIMIT): Ditto.
+	(X86_TUNE_USE_INCDEC): Ditto.
+	(X86_TUNE_INTEGER_DFMODE_MOVES): Ditto.
+	(X86_TUNE_OPT_AGU): Ditto.
+	(X86_TUNE_AVOID_LEA_FOR_ADDR): Ditto.
+	(X86_TUNE_AVOID_MEM_OPND_FOR_CMOVE): Ditto.
+	(X86_TUNE_USE_SAHF): Ditto.
+	(X86_TUNE_USE_CLTD): Ditto.
+	(X86_TUNE_USE_BT): Ditto.
+	(X86_TUNE_ONE_IF_CONV_INSN): Ditto.
+	(X86_TUNE_EXPAND_ABS): Ditto.
+	(X86_TUNE_USE_SIMODE_FIOP): Ditto.
+	(X86_TUNE_EXT_80387_CONSTANTS): Ditto.
+	(X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto.
+	(X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto.
+	(X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS): Ditto.
+	(X86_TUNE_SLOW_PSHUFB): Ditto.
+	(X86_TUNE_EMIT_VZEROUPPER): Removed.
+	* config/i386/xmmintrin.h (enum _mm_hint): Remove _MM_HINT_ET1.
+	* doc/extend.texi: Remove Xeon Phi.
+	* doc/invoke.texi: Ditto.
+
+2024-05-20  Pan Li  <pan2.li@intel.com>
+
+	* dse.cc (get_stored_val): Make sure read_mode/write_mode
+	is valid subreg before gen_lowpart.
+
 2024-05-19  Jeff Law  <jlaw@ventanamicro.com>
 
 	PR target/115142
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 8671e9f826e6..2affb73fdd45 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240520
+20240521
diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index 15712e9cb05c..dbdb1c7a350e 100644
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,3 +1,372 @@
+2024-05-20  Bob Duff  <duff@adacore.com>
+
+	* sem_ch12.adb: Misc cleanups and comment fixes.
+	(Check_Overloaded_Formal_Subprogram): Remove the Others_Choice
+	error message.
+	(Others_Choice): Remove this variable; no longer needed.
+	* types.ads (Text_Ptr): Add a range constraint limiting the
+	subtype to values that are actually used. This has the advantage
+	that when the compiler is compiled with validity checks,
+	uninitialized values of subtypes Text_Ptr and Source_Ptr will be
+	caught.
+	* sinput.ads (Sloc_Adjust): Use the base subtype; this is used as
+	an offset, so we need to allow arbitrary negative values.
+
+2024-05-20  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* exp_ch7.ads (Preload_Finalization_Collection): Delete.
+	* exp_ch7.adb (Allows_Finalization_Collection): Revert change.
+	(Preload_Finalization_Collection): Delete.
+	* opt.ads (Interface_Seen): Likewise.
+	* scng.adb (Scan): Revert latest change.
+	* sem_ch10.adb: Remove clause for Exp_Ch7.
+	(Analyze_Compilation_Unit): Revert latest change.
+	* libgnat/i-c.ads: Use a fully qualified name for the standard "+"
+	operator in the preconditons/postconditions of subprograms.
+
+2024-05-20  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* exp_aggr.adb (Expand_Record_Aggregate.Component_OK_For_Backend):
+	Also return False for a delayed conditional expression.
+
+2024-05-20  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* freeze.ads (Check_Compile_Time_Size): Remove obsolete description
+	of usage for the Size_Known_At_Compile_Time flag.
+	* freeze.adb (Check_Compile_Time_Size.Size_Known): In the case where
+	a variant part is present, do not return False if Esize is known.
+	* sem_util.adb (Needs_Secondary_Stack.Caller_Known_Size_Record): Add
+	missing "Start of processing" comment.  Return true if either a size
+	clause or an object size clause has been given for the first subtype
+	of the type.
+
+2024-05-20  Bob Duff  <duff@adacore.com>
+
+	* sinfo.ads: Misc comment corrections and clarifications.
+	The syntax for GENERIC_ASSOCIATION and FORMAL_PACKAGE_ACTUAL_PART
+	was wrong.
+	Emphasize that "others => <>" is not represented as an
+	N_Generic_Association (with or without Box_Present set),
+	and give examples illustrating the various possibilities.
+
+2024-05-20  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* einfo-utils.ads (Is_Base_Type): Move to Miscellaneous Subprograms
+	section and add description.
+	* fe.h (Is_Base_Type): Declare.
+
+2024-05-20  Gary Dismukes  <dismukes@adacore.com>
+
+	* sem_aggr.adb (Resolve_Aggregate): Move condition and call for
+	Resolve_Record_Aggregate in front of code related to calling
+	Resolve_Container_Aggregate (and add test that the aggregate is
+	not homogeneous), and remove special-case testing and call to
+	Resolve_Container_Aggregate for empty aggregates. Also, add error
+	check for an attempt to use "[]" for an aggregate of a record type
+	that does not specify an Aggregate aspect.
+	(Resolve_Record_Aggregate): Remove error check for record
+	aggregates with "[]" (now done by Resolve_Aggregate).
+
+2024-05-20  Gary Dismukes  <dismukes@adacore.com>
+
+	* sem_aggr.adb (Resolve_Aggregate): Move condition and call for
+	Resolve_Record_Aggregate in front of code related to calling
+	Resolve_Container_Aggregate (and add test that the aggregate
+	is not homogeneous), and remove special-case testing and call
+	to Resolve_Container_Aggregate for empty aggregates.
+
+2024-05-20  Justin Squirek  <squirek@adacore.com>
+
+	* accessibility.adb (Accessibility_Level): Add cases for 'First
+	and 'Last.
+
+2024-05-20  Justin Squirek  <squirek@adacore.com>
+
+	* sem_attr.adb (Analyze_Attribute): Remove restriction on 'Super
+	for abstract types.
+
+2024-05-20  Piotr Trojanek  <trojanek@adacore.com>
+
+	* sem_attr.ads (Attribute_Impl_Def): Fix list of
+	implementation-defined attributes.
+
+2024-05-20  Piotr Trojanek  <trojanek@adacore.com>
+
+	* sem_attr.adb (Attribute_12): Add attributes Old,
+	Overlaps_Storage and Result.
+
+2024-05-20  Piotr Trojanek  <trojanek@adacore.com>
+
+	* sem_attr.adb (Analyze_Attribute): Move IF statement that
+	checks restriction No_Implementation_Attributes for Ada 2005,
+	2012 and Ada 2022 attributes inside Comes_From_Source condition
+	that checks the same restriction for Ada 83 attributes.
+
+2024-05-20  Piotr Trojanek  <trojanek@adacore.com>
+
+	* sem_attr.adb (Analyze_Attribute): Remove condition that is
+	already checked by an enclosing IF statement.
+
+2024-05-20  Piotr Trojanek  <trojanek@adacore.com>
+
+	* sem_attr.ads (Universal_Type_Attribute): Simplify using
+	array aggregate syntax with discrete choice list.
+
+2024-05-20  Piotr Trojanek  <trojanek@adacore.com>
+
+	* sem_attr.ads (Attribute_Impl_Def): Fix style in comment.
+
+2024-05-20  Ronan Desplanques  <desplanques@adacore.com>
+
+	* libgnarl/s-taprop__linux.adb (Enter_Task): Move setting
+	of thread ID out of Enter_Task.
+	(Initialize): Set thread ID for the environment task.
+	(Create_Task): Remove now unnecessary Unrestricted_Access
+	attribute and add justification for a memory write.
+	* libgnarl/s-taprop__posix.adb: Likewise.
+	* libgnarl/s-taprop__qnx.adb: Likewise.
+	* libgnarl/s-taprop__rtems.adb: Likewise.
+	* libgnarl/s-taprop__solaris.adb: Likewise.
+	* libgnarl/s-taspri__posix.ads: Remove pragma Atomic for
+	Private_Data.Thread, and update documentation comment.
+	* libgnarl/s-taspri__lynxos.ads: Likewise.
+	* libgnarl/s-taspri__posix-noaltstack.ads: Likewise.
+	* libgnarl/s-taspri__solaris.ads: Likewise.
+	* libgnarl/s-tporft.adb (Register_Foreign_Thread): Adapt to
+	Enter_Task not setting the thread ID anymore.
+	* libgnarl/s-tassta.adb (Task_Wrapper): Update comment.
+
+2024-05-20  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* exp_aggr.ads (Is_Delayed_Conditional_Expression): New predicate.
+	* exp_aggr.adb (Convert_To_Assignments.Known_Size): Likewise.
+	(Convert_To_Assignments): Climb the parent chain, looking through
+	qualified expressions and dependent expressions of conditional
+	expressions, to find out whether the expansion may be delayed.
+	Call Known_Size for this in the case of an object declaration.
+	If so, set Expansion_Delayed on the aggregate as well as all the
+	intermediate conditional expressions.
+	(Initialize_Component): Reset the Analyzed flag on an initialization
+	expression that is a conditional expression whose expansion has been
+	delayed.
+	(Is_Delayed_Conditional_Expression): New predicate.
+	* exp_ch3.adb (Expand_N_Object_Declaration): Handle initialization
+	expressions that are conditional expressions whose expansion has
+	been delayed.
+	* exp_ch4.adb (Build_Explicit_Assignment): New procedure.
+	(Expand_Allocator_Expression): Handle initialization expressions
+	that are conditional expressions whose expansion has been delayed.
+	(Expand_N_Case_Expression): Deal with expressions whose expansion
+	has been delayed by waiting for the rewriting of their parent as
+	an assignment statement and then optimizing the assignment.
+	(Expand_N_If_Expression): Likewise.
+	(Expand_N_Qualified_Expression): Do not apply a predicate check to
+	an operand that is a delayed aggregate or conditional expression.
+	* gen_il-gen-gen_nodes.adb (N_If_Expression): Add Expansion_Delayed
+	semantic flag.
+	(N_Case_Expression): Likewise.
+	* sinfo.ads (Expansion_Delayed): Document extended usage.
+
+2024-05-20  Gary Dismukes  <dismukes@adacore.com>
+
+	* exp_aggr.adb (Expand_Container_Aggregate): Add top-level
+	variables Choice_{Lo|Hi} and Int_Choice_{Lo|Hi} used for
+	determining the low and high bounds of component association
+	choices. Replace code for determining whether we have an indexed
+	aggregate with call to new function Sem_Aggr.Is_Indexed_Aggregate.
+	Remove test of whether Empty_Subp is a function, since it must be
+	a function. Move Default and Count_Type to be locals of a new
+	block enclosing the code that creates the object to hold the
+	aggregate length, and set them according to the default and type
+	of the Empty function's parameter when present (and to Empty and
+	Standard_Natural otherwise). Use Siz_Exp for the aggregate length
+	when set, and use Empty's default length when available, and use
+	zero for the length otherwise. In generating the call to the
+	New_Indexed function, use the determined lower and upper bounds if
+	determined earlier by Aggregate_Size, and otherwise compute those
+	from the index type's lower bound and the determined aggregate
+	length. In the case where a call to Empty is generated and the
+	function has a formal parameter, pass the value saved in Siz_Decl
+	(otherwise the parameter list is empty). Remove code specific to
+	making a parameterless call to the Empty function. Extend the code
+	for handling positional container aggregates to account for types
+	that define Assign_Indexed, rather than just Add_Unnamed, and in
+	the case of indexed aggregates, create a temporary object to hold
+	values of the aggregate's key index, and initialize and increment
+	that temporary for each call generated to the Assign_Indexed
+	procedure. For named container aggregates that have key choices
+	given by ranges, call Expand_Range_Component to generate a loop
+	that will call the appropriate insertion procedure for each value
+	of the range. For indexed aggregates with a Component_Associations
+	list, set and use the Assign_Indexed procedure for each component
+	association, whether or not there's an iterator specification.
+	(Add_Range_Size): Add code to determine the low and high bounds of
+	the range and capture those in up-level variables when their value
+	is less than or greater than (respectively) the current minimum
+	and maximum bounds values.
+	(Aggregate_Size): Separately handle the case where a single choice
+	is of a discrete type, and call Add_Range_Size to take its value
+	into consideration for determination of min and max bounds of the
+	aggregate. Add comments in a couple of places.
+	(Build_Siz_Exp): Remove the last sentence and "???" from the
+	comment that talks about accumulating nonstatic sizes, since that
+	sentence seems to be obsolete. Record the low and high bound
+	values in Choice_Lo and Choice_Hi in the case of a nonstatic
+	range.
+	(Expand_Iterated_Component): Set the Defining_Identifier of the
+	iterator specification to the Loop_Id in the
+	N_Iterated_Component_Association case.
+	(Expand_Range_Component): Procedure unnested from the block
+	handling indexed aggregates in Expand_Container_Aggregate, and
+	moved to top level of that procedure so it can also be called for
+	Add_Named cases. A formal parameter Insert_Op is added, and
+	existing calls to this procedure are changed to pass the
+	appropriate insertion procedure's Entity.
+	* sem_aggr.ads: Add with_clause for Sinfo.Nodes.
+	(Is_Indexed_Aggregate): New function for use by
+	Resolve_Container_Aggregate and Expand_Container_Aggregate.
+	* sem_aggr.adb: Add with_clause for Sem_Ch5. Move with_clause for
+	Sinfo.Nodes to sem_aggr.ads.
+	(Is_Indexed_Aggregate): New function to determine whether a
+	container aggregate is a container aggregate (replacing local
+	variable of the same name in Resolve_Container_Aggregate).
+	(Resolve_Iterated_Association): Remove part of comment saying that
+	a Key_Expression is always present. Set Parent field of the copy
+	of a component association with a loop parameter specification. On
+	the setting of Loop_Param_Id, account for a
+	Loop_Parameter_Specification being changed into an
+	Iterator_Specification as a result of being analyzed. Only call
+	Preanalyze_And_Resolve on Key_Expr when a key expression is
+	actually present. Remove loop for handling choices for the case of
+	an N_Component_Association with a Defining_Identifier (there
+	shouldn't be more than one choice in this case, and add an
+	assertion to ensure that). Also add code here to handle the case
+	where the choice is a function call, creating an
+	iterator_specification analyzing it, and call
+	Resolve_Iterated_Association recursively to process it. Add error
+	check to enforce RM22 4.3.5(27), which requires that the type of
+	the loop parameter must be the same as the key type when there is
+	no key expression and the aggregate is an indexed aggregate or has
+	an Add_Named op.
+	(Resolve_Container_Aggregate): In the Add_Unnamed case, call
+	Resolve_Iterated_Association for both
+	N_Iterated_Element_Association and N_Component_Association (rather
+	than just the latter). Remove error check for nonstatic choices in
+	component associations in Add_Named cases (multiple named
+	nonstatic associations are fine except in indexed aggregates).
+	Remove local variable Is_Indexed_Aggregate, replaced with new
+	library-level function of the same name, and add test of
+	Is_Indexed_Aggregate in the case where the aggregate type has an
+	Assign_Indexed operation, as a guard for doing error checks for
+	indexed aggregates. For indexed aggregate resolution, do not call
+	Analyze_And_Resolve on the expression of an
+	N_Component_Association in the "box association" case. Move error
+	checks for indexed aggregates with iterated associations that flag
+	cases where an association is a loop_parameter_specification with
+	an iterator filter or a key expression (violation of RM22
+	4.3.5(28/5)), from the loop that checks for contiguous and
+	nonoverlapping choices and into the preceding association loop
+	after the call to Resolve_Iterated_Association. The RM reference
+	is added to the error-message strings.
+
+2024-05-20  Ronan Desplanques  <desplanques@adacore.com>
+
+	* libgnarl/s-taprop__linux.adb (Set_Task_Affinity): Fix
+	decision about whether to call CPU_FREE.
+
+2024-05-20  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* exp_aggr.ads (Convert_Aggr_In_Allocator): Remove Aggr parameter
+	and adjust description.
+	(Convert_Aggr_In_Object_Decl): Adjust description.
+	* exp_aggr.adb (Convert_Aggr_In_Allocator): Remove Aggr parameter
+	and add local variable of the same name instead.  Adjust call to
+	Convert_Array_Aggr_In_Allocator.
+	(Convert_Aggr_In_Object_Decl): Add comment for early return and
+	remove useless inner block statement.
+	(Convert_Array_Aggr_In_Allocator):  Remove Aggr parameter and add
+	local variable of the same name instead.
+	(In_Place_Assign_OK): Move down declarations of local variables.
+	(Convert_To_Assignments): Put all declarations of local variables
+	in the same place.  Fix typo in comment.  Replace T with Full_Typ.
+	* exp_ch4.adb (Expand_Allocator_Expression): Call Unqualify instead
+	of Expression on the qualified expression of the allocator for the
+	sake of consistency.  Adjust call to Convert_Aggr_In_Allocator.
+
+2024-05-20  Piotr Trojanek  <trojanek@adacore.com>
+
+	* sem_attr.adb (Eval_Attribute): Handle enumeration type with
+	Discard_Names.
+
+2024-05-20  Piotr Trojanek  <trojanek@adacore.com>
+
+	* exp_imgv.adb (Expand_Width_Attribute): Fix for 'Width that
+	is computed at run time.
+	* sem_attr.adb (Eval_Attribute): Fix for 'Width that is computed
+	at compilation time.
+
+2024-05-20  Sebastian Poeplau  <poeplau@adacore.com>
+
+	* libgnat/s-pooglo.adb (Allocate): Use arithmetic on
+	System.Address to compute the aligned address.
+
+2024-05-20  Steve Baird  <baird@adacore.com>
+
+	* freeze.adb (Adjust_Esize_For_Alignment): Assert that a valid
+	Alignment specification cannot result in adjusting the given
+	type's Esize to be larger than System_Max_Integer_Size.
+	* sem_ch13.adb (Analyze_Attribute_Definition_Clause): In analyzing
+	an Alignment specification, enforce the rule that a specified
+	Alignment value for a discrete or fixed-point type shall not be
+	larger than System_Max_Integer_Size / 8 .
+
+2024-05-20  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* libgnat/g-sothco.ads (In_Addr): Add aspect Universal_Aliasing.
+
+2024-05-20  Jose Ruiz  <ruiz@adacore.com>
+
+	* sem_prag.adb (Analyze_Pragma): Exclude detection of duplicates
+	because they are detected elsewhere.
+
+2024-05-20  Jose Ruiz  <ruiz@adacore.com>
+
+	* exp_ch9.adb (Expand_N_Protected_Type_Declaration): Clarify
+	comments.
+	* sem_prag.adb (Analyze_Pragma): Check for duplicates
+	Max_Entry_Queue_Length, Max_Entry_Queue_Depth and Max_Queue_Length
+	for the same protected entry.
+	* sem_util.adb (Get_Max_Queue_Length): Take into account all three
+	representation aspects that can be used to set this restriction.
+	(Has_Max_Queue_Length): Likewise.
+	* doc/gnat_rm/implementation_defined_pragmas.rst:
+	(pragma Max_Queue_Length): Fix pragma in example.
+	* gnat_rm.texi: Regenerate.
+
+2024-05-20  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* libgnat/s-finpri.ads (Collection_Node): Move to private part.
+	(Collection_Node_Ptr): Likewise.
+	(Header_Alignment): Change to declaration and move completion to
+	private part.
+	(Header_Size): Likewise.
+	(Lock_Type): Delete.
+	(Finalization_Collection): Move Lock component and remove default
+	value for Finalization_Started component.
+	* libgnat/s-finpri.adb (Initialize): Reorder statements.
+
+2024-05-20  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* doc/gnat_rm/implementation_defined_pragmas.rst
+	(Universal_Aliasing): Remove reference to No_Strict_Aliasing.
+	* doc/gnat_ugn/gnat_and_program_execution.rst
+	(Optimization and Strict Aliasinng): Simplify first example and
+	make it more consistent with the second.  Add description of the
+	effects of pragma Universal_Aliasing and document new warning
+	issued for unchecked conversions.  Remove obsolete stuff.
+	* gnat_rm.texi: Regenerate.
+	* gnat_ugn.texi: Regenerate.
+
 2024-05-17  Eric Botcazou  <ebotcazou@adacore.com>
 
 	PR ada/115133
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index efbeea658cba..89ccca27dc49 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,23 @@
+2024-05-20  Mikael Morin  <mikael@gcc.gnu.org>
+
+	PR fortran/99798
+	* symbol.cc (gfc_release_symbol): Move the condition guarding
+	the handling cyclic references...
+	(cyclic_reference_break_needed): ... here as a new predicate.
+	Remove superfluous parts.  Add a condition preventing any premature
+	release with submodule symbols.
+
+2024-05-20  Tobias Burnus  <tburnus@baylibre.com>
+
+	PR fortran/115150
+	* trans-intrinsic.cc (gfc_conv_intrinsic_bound): Fix SHAPE
+	for zero-size arrays
+
+2024-05-20  Tobias Burnus  <tburnus@baylibre.com>
+
+	* invoke.texi (fcoarray): Link to OpenCoarrays.org;
+	mention libcaf_single.
+
 2024-05-17  Paul Thomas  <pault@gcc.gnu.org>
 
 	PR fortran/114874
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5efa506f8419..2fc028fc392a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,120 @@
+2024-05-21  Gaius Mulley  <gaiusmod2@gmail.com>
+
+	PR modula2/115164
+	* gm2/isolib/run/pass/testlowread.mod: New test.
+	* gm2/isolib/run/pass/testwritereal.mod: New test.
+
+2024-05-20  Andrew Pinski  <quic_apinski@quicinc.com>
+
+	PR tree-optimization/115143
+	* gcc.c-torture/compile/pr115143-1.c: New test.
+	* gcc.c-torture/compile/pr115143-2.c: New test.
+	* gcc.c-torture/compile/pr115143-3.c: New test.
+
+2024-05-20  Mikael Morin  <mikael@gcc.gnu.org>
+
+	PR fortran/99798
+	* gfortran.dg/submodule_33.f08: New test.
+
+2024-05-20  Pengxuan Zheng  <quic_pzheng@quicinc.com>
+
+	PR target/102171
+	* gcc.target/aarch64/pr113573.c: Replace __builtin_aarch64_get_lowv8hi
+	with vget_low_s16.
+	* gcc.target/aarch64/vget_low_2.c: New test.
+	* gcc.target/aarch64/vget_low_2_be.c: New test.
+
+2024-05-20  Steve Baird  <baird@adacore.com>
+
+	* gnat.dg/specs/alignment2.ads: Adjust.
+	* gnat.dg/specs/alignment2_bis.ads: New test.
+
+2024-05-20  Tobias Burnus  <tburnus@baylibre.com>
+
+	PR fortran/115150
+	* gfortran.dg/shape_12.f90: New test.
+
+2024-05-20  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* g++.dg/other/i386-2.C: Remove Xeon Phi ISAs.
+	* g++.dg/other/i386-3.C: Ditto.
+	* g++.target/i386/mv28.C: Ditto.
+	* gcc.target/i386/builtin_target.c: Ditto.
+	* gcc.target/i386/sse-12.c: Ditto.
+	* gcc.target/i386/sse-13.c: Ditto.
+	* gcc.target/i386/sse-14.c: Ditto.
+	* gcc.target/i386/sse-22.c: Ditto.
+	* gcc.target/i386/sse-23.c: Ditto.
+	* gcc.target/i386/sse-26.c: Ditto.
+	* gcc.target/i386/avx5124fmadd-v4fmaddps-1.c: Removed.
+	* gcc.target/i386/avx5124fmadd-v4fmaddps-2.c: Ditto.
+	* gcc.target/i386/avx5124fmadd-v4fmaddss-1.c: Ditto.
+	* gcc.target/i386/avx5124fmadd-v4fnmaddps-1.c: Ditto.
+	* gcc.target/i386/avx5124fmadd-v4fnmaddps-2.c: Ditto.
+	* gcc.target/i386/avx5124fmadd-v4fnmaddss-1.c: Ditto.
+	* gcc.target/i386/avx5124vnniw-vp4dpwssd-1.c: Ditto.
+	* gcc.target/i386/avx5124vnniw-vp4dpwssd-2.c: Ditto.
+	* gcc.target/i386/avx5124vnniw-vp4dpwssds-1.c: Ditto.
+	* gcc.target/i386/avx5124vnniw-vp4dpwssds-2.c: Ditto.
+	* gcc.target/i386/avx512er-check.h: Ditto.
+	* gcc.target/i386/avx512er-vexp2pd-1.c: Ditto.
+	* gcc.target/i386/avx512er-vexp2pd-2.c: Ditto.
+	* gcc.target/i386/avx512er-vexp2ps-1.c: Ditto.
+	* gcc.target/i386/avx512er-vexp2ps-2.c: Ditto.
+	* gcc.target/i386/avx512er-vrcp28pd-1.c: Ditto.
+	* gcc.target/i386/avx512er-vrcp28pd-2.c: Ditto.
+	* gcc.target/i386/avx512er-vrcp28ps-1.c: Ditto.
+	* gcc.target/i386/avx512er-vrcp28ps-2.c: Ditto.
+	* gcc.target/i386/avx512er-vrcp28ps-3.c: Ditto.
+	* gcc.target/i386/avx512er-vrcp28ps-4.c: Ditto.
+	* gcc.target/i386/avx512er-vrcp28sd-1.c: Ditto.
+	* gcc.target/i386/avx512er-vrcp28sd-2.c: Ditto.
+	* gcc.target/i386/avx512er-vrcp28ss-1.c: Ditto.
+	* gcc.target/i386/avx512er-vrcp28ss-2.c: Ditto.
+	* gcc.target/i386/avx512er-vrsqrt28pd-1.c: Ditto.
+	* gcc.target/i386/avx512er-vrsqrt28pd-2.c: Ditto.
+	* gcc.target/i386/avx512er-vrsqrt28ps-1.c: Ditto.
+	* gcc.target/i386/avx512er-vrsqrt28ps-2.c: Ditto.
+	* gcc.target/i386/avx512er-vrsqrt28ps-3.c: Ditto.
+	* gcc.target/i386/avx512er-vrsqrt28ps-4.c: Ditto.
+	* gcc.target/i386/avx512er-vrsqrt28ps-5.c: Ditto.
+	* gcc.target/i386/avx512er-vrsqrt28ps-6.c: Ditto.
+	* gcc.target/i386/avx512er-vrsqrt28sd-1.c: Ditto.
+	* gcc.target/i386/avx512er-vrsqrt28sd-2.c: Ditto.
+	* gcc.target/i386/avx512er-vrsqrt28ss-1.c: Ditto.
+	* gcc.target/i386/avx512er-vrsqrt28ss-2.c: Ditto.
+	* gcc.target/i386/avx512pf-vgatherpf0dpd-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vgatherpf0dps-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vgatherpf0qpd-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vgatherpf0qps-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vgatherpf1dpd-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vgatherpf1dps-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vgatherpf1qpd-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vgatherpf1qps-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vscatterpf0dpd-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vscatterpf0dps-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vscatterpf0qpd-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vscatterpf0qps-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vscatterpf1dpd-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vscatterpf1dps-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vscatterpf1qpd-1.c: Ditto.
+	* gcc.target/i386/avx512pf-vscatterpf1qps-1.c: Ditto.
+	* gcc.target/i386/pr104448.c: Ditto.
+	* gcc.target/i386/pr82941-2.c: Ditto.
+	* gcc.target/i386/pr82942-2.c: Ditto.
+	* gcc.target/i386/pr82990-1.c: Ditto.
+	* gcc.target/i386/pr82990-3.c: Ditto.
+	* gcc.target/i386/pr82990-6.c: Ditto.
+	* gcc.target/i386/pr82990-7.c: Ditto.
+	* gcc.target/i386/pr89523-5.c: Ditto.
+	* gcc.target/i386/pr89523-6.c: Ditto.
+	* gcc.target/i386/pr91033.c: Ditto.
+	* gcc.target/i386/prefetchwt1-1.c: Ditto.
+
+2024-05-20  Pan Li  <pan2.li@intel.com>
+
+	* gcc.target/riscv/rvv/base/bug-6.c: New test.
+
 2024-05-19  Jeff Law  <jlaw@ventanamicro.com>
 
 	PR target/115142

                 reply	other threads:[~2024-05-21  0:17 UTC|newest]

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