Re: adding movz to machine description

["Petar Bajic" <petar.bajic@micronasnit.com>]

I finally made it work, these rules will successfully emit both movz and 
movn instructions.
Thank you for help.

(define_insn "movsicc_movz"
  [(set (match_operand:SI 0 "register_operand" "=d")
   (if_then_else:SI (eq (match_operand:SI 1 "register_operand" 
"d")(const_int 0))
    (match_operand:SI 2 "register_operand" "d")
    (match_dup 0) ))]
  ""
  "movz\\t%0,%2,%1"
  [(set_attr "type" "condmove")
   (set_attr "mode" "SI")])

(define_insn "movsicc_movn"
  [(set (match_operand:SI 0 "register_operand" "=d")
   (if_then_else:SI (ne (match_operand:SI 1 "register_operand" 
"d")(const_int 0))
    (match_operand:SI 2 "register_operand" "d")
    (match_dup 0) ))]
  ""
  "movn\\t%0,%2,%1"
  [(set_attr "type" "condmove")
   (set_attr "mode" "SI")])



(define_expand "movsicc"
    [(set (match_operand:SI 0 "register_operand" "=d")
     (if_then_else:SI
       (match_operator 1 "comparison_operator" [(match_operand:SI 4 
"register_operand" "d") (const_int 0)])
        (match_operand:SI 2 "register_operand" "d")
 (match_operand:SI 3 "register_operand" "d") ))]
  ""
  "
{
if (operands[2] != operands[0])
{
 emit_insn (gen_movsi (operands[0], operands[3]));
 if (GET_CODE(operands[1]) == EQ)
 {
    dlx_emit_cond_move_z(operands[0], operands[2], operands[3]);
    DONE;
   }
   else if (GET_CODE(operands[1]) == NE)
   {
    dlx_emit_cond_move_n(operands[0], operands[2], operands[3]);
    DONE;
   }
   else
    FAIL;
}
else
{
 if (GET_CODE(operands[1]) == NE)
 {
    dlx_emit_cond_move_z(operands[0], operands[3], operands[3]);
    DONE;
   }
   else if (GET_CODE(operands[1]) == EQ)
   {
    dlx_emit_cond_move_n(operands[0], operands[3], operands[3]);
    DONE;
   }
   else
    FAIL;
}
}")


(define_insn "movsicc_internal"
  [(set (match_operand:SI 0 "register_operand" "=j,j,j,j,j")
  (if_then_else:SI
  (match_operator 1 "comparison_operator" [(match_operand:SI 4 
"register_operand" "k,k,k,k,k") (const_int 0)])
  (match_operand:SI 2 "register_operand" "d,i,d,I,d")
  (match_operand:SI 3 "register_operand" "d,d,i,d,I")))]
  "(GET_CODE(operands[1]) == EQ)"
  "movz\\t%0,%2,%4\\n\\tmovn\\t%0,%3,%4"
  [(set_attr "type" "condmove")
   (set_attr "length" "2")
   (set_attr "mode" "SI")])


And in dlx.c functions dlx_emit_cond_move_n and dlx_emit_cond_move_z look 
like this:

int

dlx_emit_cond_move_z (rtx dest, rtx src1, rtx src2)

{

dlx_compare_op0 = force_reg(SImode, dlx_compare_op0);

emit_insn(gen_movsicc_movz(dest, dlx_compare_op0, src1));

}

int

dlx_emit_cond_move_n (rtx dest, rtx src1, rtx src2)

{

dlx_compare_op0 = force_reg(SImode, dlx_compare_op0);

emit_insn(gen_movsicc_movn(dest, dlx_compare_op0, src1));

}

best regards,
Petar Bajic

----- Original Message ----- 
From: "Ian Lance Taylor" <iant@google.com>
To: "Petar Bajic" <petar.bajic@micronasnit.com>
Cc: <gcc-help@gcc.gnu.org>
Sent: Tuesday, July 25, 2006 3:39 PM
Subject: Re: adding movz to machine description


> "Petar Bajic" <petar.bajic@micronasnit.com> writes:
>
>> > It may be correct for the pattern to not be matched with expand.  It's
>> > OK if the if-conversion pass picks it up, which seems to be what is
>> > happening for you.
>> >
>> > If the generated code you are getting is wrong, then problem is likely
>> > in the define_insn patterns somewhere.  They don't correct represent
>> > what the instruction does, or they don't correctly implement it.
>> >
>> > Ian
>>
>> After some modifications, I managed to make gcc use my define_expand -
>> I see it in debug.11.ce1 and following files, but then it disapears in
>> debug.17.combine, and in the end it does not appear in asm code. How
>> to find out what kills it? :)
>
> That means that the combine pass has replaced it with something else
> which is equivalent which the combine pass thought would be cheaper.
> Look at the generated RTL to see what it turned into.  If the
> resulting code is less efficient to run, then you need to adjust your
> costs (the TARGET_RTX_COSTS hook).
>
> Ian