[new user] gcc from command line versus makefile

[new user] gcc from command line versus makefile

[drulius]

hi,

I have tried to simplify my complete problem as much as possible.  I have
narrowed the trouble down to this scenario:

From the command line I can successfully compile, link, and end up with an
executable by running the following two lines:

  c:\temp\nasm32 -f coff C:\temp\asgn4.asm -o C:\temp\asgn4.o
  gcc -o C:\temp\asgn4.exe C:\temp\dvideo.c C:\temp\asgn4.o

but if I use what I think are the same lines in a makefile (below), the
object files don't link properly:

 .phony: all
	
 all: app

 app: DVIDEO.C DVIDEO.H ASGN4
	gcc -o C:\temp\asgn4.exe C:\temp\DVIDEO.C C:\temp\ASGN4.o

 ASGN4: ASGN4.ASM
	C:\temp\nasm32 -f coff C:\temp\ASGN4.ASM -o C:\temp\ASGN4.o

By using the -Xlinker --verbose option, I can see that the two .o object
files are created, because they are successfully opened at the beginning of
the link stage.  But then all the functions that are implemented in the .asm
file, declared extern in dvideo.h, and called in main() are not found and
the linker throws a bunch of "undefined reference to xxx" errors.

Does anyone know what my trouble is?
-- 
View this message in context: http://www.nabble.com/-new-user--gcc-from-command-line-versus-makefile-tp14286584p14286584.html
Sent from the gcc - Help mailing list archive at Nabble.com.