From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jeffrey A Law <law@cygnus.com>
To: pmw@uk.research.att.com (Paul Webster)
Cc: gcc-help@gcc.gnu.org
Subject: Re: Immediate Problems at the Reload Phase of GCC 
Date: Sat, 01 Apr 2000 00:00:00 -0000
Message-ID: <2746.951848730@upchuck>
References: <200002291823.SAA12545@rocoto>
X-SW-Source: 2000-q1/msg00305.html
Message-ID: <20000401000000.PSuTkm7iEIb6fsvoUUQHUPpYzpgPx4VpXsrc_AbeFjo@z>

  In message < 200002291823.SAA12545@rocoto >you write:
  > 
  > This question is regarding gcc version 2.95.2.
  > 
  > I am working with an instruction set that contains an immediate and registe
  > r
  > based compare for equality instruction. The immediate version can take a 16
  > -bit
  > signed value and a register. The register version takes two registers.
  > 
  > Currently, I have a define_insn for the register comparison. I also have a
  > define_insn for the immediate variation, constrained to only accept 16-bit 
  > signed values.
Use a single define_insn with multiple alternative constraints.  

  > I guess the solution is to block this propogation in the reload phase?
No.  That would just paper over the problem.

jeff