From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by sourceware.org (Postfix) with ESMTP id 2CBA23858406 for ; Wed, 23 Feb 2022 00:23:54 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2CBA23858406 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=kernel.crashing.org Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id 21N0MrLb018343; Tue, 22 Feb 2022 18:22:53 -0600 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id 21N0Mrsl018339; Tue, 22 Feb 2022 18:22:53 -0600 X-Authentication-Warning: gate.crashing.org: segher set sender to segher@kernel.crashing.org using -f Date: Tue, 22 Feb 2022 18:22:53 -0600 From: Segher Boessenkool To: William Tambe Cc: gcc-help Subject: Re: Make GCC move instructions between a multi-cycle instruction and the next instruction that depends on its result. Message-ID: <20220223002253.GB614@gate.crashing.org> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.3i X-Spam-Status: No, score=-3.3 required=5.0 tests=BAYES_00, JMQ_SPF_NEUTRAL, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-help@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-help mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 Feb 2022 00:23:55 -0000 On Tue, Feb 22, 2022 at 03:15:55PM -0600, William Tambe via Gcc-help wrote: [snip] > > Without above transformation, `add %4 %7` would cause the cpu to wait > > on `div %4 %5` when it could have executed instructions that do not > > depend on the result of "div". > > How to implement above transformation such that GCC moves instructions > between a multi-cycle instruction and the next instruction that > depends on its result ? GCC has a pretty advanced instruction scheduler. You can start looking at for example? Segher