From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 32637 invoked by alias); 28 Jan 2010 06:16:54 -0000 Received: (qmail 32626 invoked by uid 22791); 28 Jan 2010 06:16:51 -0000 X-SWARE-Spam-Status: No, hits=-1.4 required=5.0 tests=AWL,BAYES_00,SPF_HELO_PASS,SPF_PASS X-Spam-Check-By: sourceware.org Received: from kuber.nabble.com (HELO kuber.nabble.com) (216.139.236.158) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 28 Jan 2010 06:15:58 +0000 Received: from isper.nabble.com ([192.168.236.156]) by kuber.nabble.com with esmtp (Exim 4.63) (envelope-from ) id 1NaNfX-0006Vg-OY for gcc-help@gcc.gnu.org; Wed, 27 Jan 2010 22:15:55 -0800 Message-ID: <27351551.post@talk.nabble.com> Date: Thu, 28 Jan 2010 06:16:00 -0000 From: noeljohn To: gcc-help@gcc.gnu.org Subject: Re: Emission of store_multiple and load_multiple patterns In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit References: <26739724.post@talk.nabble.com> <26775192.post@talk.nabble.com> X-IsSubscribed: yes Mailing-List: contact gcc-help-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-help-owner@gcc.gnu.org X-SW-Source: 2010-01/txt/msg00261.txt.bz2 Ian Lance Taylor-3 wrote: > > noeljohn writes: > >> Ian Lance Taylor-3 wrote: >>> >>> noeljohn writes: >>> >>>> I am working on a new risc machine. I have defined the >>>> "store_multiple" and "load_multiple" pattern and the system builds >>>> fine. >>>> But >>>> when I compile the C program for a declared integer array, the >>>> "store_multiple" and "load_multiple" patterns are not getting emitted. >>>> Instead simple load and store patterns are emitted multiple times. As >>>> per >>>> actual working store_multiple and load_multiple patters need to get >>>> emitted. >>> >>> What do your store_multiple and load_multiple insns look like? >>> >>> E.g., if they only work for consecutive registers, then gcc can only >>> match them after register allocation, but there is no appropriate >>> optimization pass to do so. In that case you are going to have write >>> peepholes for them, and you're going to have to generate them >>> explicitly in your backend's prologue and epilogue generation. >>> >>> >>> Ian >>> >>> >> >> >> Thank you for replying. >> According to my understanding, it works for consecutive registers as I am >> just declaring an array in my test case. To be specific, how do I get >> "rodata" section in assembly generated that contains only the >> data(integers) >> in the array declared,, because when I compile with other already build >> processors, it creates this rodata section and then using a single >> instruction stores all the elements of array in memory. > > > It's difficult to say how this works without more information. Is the > array being treated as a vector? > > It's easy enough to get an rodata section in your assembly code, that > should happen more or less automatically if you write > const int ai[] = { 1, 2, 3, 4 }; > I don't know how to load that using a load-multiple instruction unless > it is being treated as a vector. > > Ian > > Hello Sir, The array as I have seen is not being treated as a vector. What it does is it directly loads the integer array data into the stack. This is normally done for processors which does not have a support for multiple loading and storing of words. Is there any way by which we can convey gcc through macros that our architecture supports this multiple loading and storing facility? Awaiting for your help. noeljohn -- View this message in context: http://old.nabble.com/Emission-of-store_multiple-and-load_multiple-patterns-tp26739724p27351551.html Sent from the gcc - Help mailing list archive at Nabble.com.